MSP430F147 Datasheet, PDF (35/59 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430x13x, MSP430x14x, MSP430x14x1
MIXED SIGNAL MICROCONTROLLER
SLAS272F − JULY 2000 − REVISED JUNE 2004
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted) (continued)
12-bit ADC, built-in reference
VREF+
AVCC(min)
IVREF+
IL(VREF)+ ^†
PARAMETER
TEST CONDITIONS
Positive built-in reference
voltage output
AVCC minimum voltage,
Positive built-in reference
active
REF2_5V = 1 for 2.5 V
IVREF+ ≤ IVREF+max
REF2_5V = 0 for 1.5 V
IVREF+ ≤ IVREF+max
REF2_5V = 0, IVREF+ ≤ 1mA
REF2_5V = 1, IVREF+ ≤ 0.5mA
REF2_5V = 1, IVREF+ ≤ 1mA
Load current out of VREF+
terminal
3V
2.2 V/3 V
2.2 V
3V
Load-current regulation
VREF+ terminal
IVREF+ = 500 µA +/− 100 µA
Analog input voltage ~0.75 V;
REF2_5V = 0
IVREF+ = 500 µA ± 100 µA
Analog input voltage ~1.25 V;
REF2_5V = 1
2.2 V
3V
3V
MIN NOM
2.4 2.5
1.44 1.5
2.2
VREF+ + 0.15
VREF+ + 0.15
0.01
MAX UNIT
2.6
V
1.56
V
−0.5
mA
−1
±2
LSB
±2
±2 LSB
IDL(VREF) _+‡
Load current regulation
VREF+ terminal
IVREF+ =100 µA → 900 µA,
CVREF+=5 µF, ax ~0.5 x VREF+
3V
Error of conversion result ≤ 1 LSB
20 ns
CVREF+
TREF+†
Capacitance at pin VREF+
(see Note 1)
Temperature coefficient of
built-in reference
REFON =1,
0 mA ≤ IVREF+ ≤ IVREF+max
IVREF+ is a constant in the range of
0 mA ≤ IVREF+ ≤ 1 mA
2.2 V/3 V
2.2 V/3 V
5
10
µF
±100 ppm/°C
tREFON†
Settle time of internal
reference voltage (see
Figure 13 and Note 2)
IVREF+ = 0.5 mA, CVREF+ = 10 µF,
VREF+ = 1.5 V, VAVCC = 2.2 V
17 ms
† _{Not production tested, limits characterized}
‡ _{Not production tested, limits verified by design}
NOTES: 1. The internal buffer operational amplifier and the accuracy specifications require an external capacitor. All INL and DNL tests uses
two capacitors between pins VREF+ and AVSS and VREF−/VeREF− and AVSS: 10 µF tantalum and 100 nF ceramic.
NOTES: 2. The condition is that the error in a conversion started after tREFON is less than ±0.5 LSB. The settling time depends on the external
capacitive load.
CVREF+
100 µF
10 µF
tREFON ≈ .66 x CVREF+ [ms] with CVREF+ in µF
1 µF
0
1 ms
10 ms
100 ms tREFON
Figure 13. Typical Settling Time of Internal Reference t_REFON vs External Capacitor on V_REF+
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