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TLC320AD80C Datasheet, PDF (32/36 Pages) Texas Instruments – Audio Processor Subsystem | |||
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Appendix A
Register Set
Control of the TLC320AD80 is accomplished by means of the SPI serial interface and the control registers
described in this section.
There are five control registers used to control the various functions of the device: volume control,
multiplexer selections, serial interface, modes of operation, etc.
Table Aâ1. Serial PCM Data Format Control Register (Control Register 00h)
D7 D6 D5 D4 D3 D2 D1 D0
00ââââââ
FUNCTION
Philips I2S protocol
01â
â
â
â
â â Serial PCM
Right justified
10â
â
â
â
â â data format
Left justified
11ââââââ
Left justified DSP (inverted BCLK)
ââ0
â
â
â
â â Serial PCM
16 bits
â â 1 â â â â â data precision 18 bits
âââ00âââ
256 x LRCLK (22.05 kHz ⤠LRCLK ⤠48 kHz)
â â â 0 1 â â â MCLK rate
384 x LRCLK (22.05 kHz ⤠LRCLK ⤠48 kHz)
âââ10âââ
512 x LRCLK (8 kHz ⤠LRCLK ⤠16 kHz)
â â â 1 1 â â â Reserved
âââââ00â
64 x LRCLK
â
â
â
â
â
0
1
â
Bit clock
(BCLK) rate
48 x LRCLK (384x mode only)
âââââ10â
32 x LRCLK (16-bit mode only)
â â â â â 1 1 â Reserved
â â â â â â â x Reserved
The default value at reset is 00h.
Aâ1
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