CC2480_11 Datasheet, PDF (32/48 Pages) Texas Instruments – Z-Accel 2.4 GHz ZigBee Processor

CC2480
MAC
Layer
Bytes: 2
1
0 to 20
Frame
Control Field
(FCF)
Data
Sequence
Number
Address
Information
MAC Header (MHR)
n
Frame payload
MAC Payload
Bytes: 4
1
1
PHY
Layer
Preamble
Sequence
Start of frame
Delimiter
(SFD)
Frame
Length
Synchronisation Header
PHY Header
(SHR)
(PHR)
5 + (0 to 20) + n
MAC Protocol
Data Unit
(MPDU)
PHY Service Data Unit
(PSDU)
11 + (0 to 20) + n
PHY Protocol Data Unit
(PPDU)
2
Frame Check
Sequence
(FCS)
MAC Footer
(MFR)
Figure 13: Schematic view of the IEEE 802.15.4 Frame Format [1]
10.4 Synchronization header
The synchronization header (SHR) consists of
the preamble sequence followed by the start of
frame delimiter (SFD). In [1], the preamble
sequence is defined to be four bytes of 0x00.
The SFD is one byte, set to 0xA7.
A synchronization header is always
transmitted first in all transmit modes.
In receive mode CC2480 uses the preamble
sequence for symbol synchronization and
frequency offset adjustments. The SFD is
used
for
byte
synchronization.
10.5 MAC protocol data unit
The FCF, data sequence number and address
information follows the length field as shown in
Figure 13. Together with the MAC data
payload and Frame Check Sequence, they
form the MAC Protocol Data Unit (MPDU).
The format of the FCF is shown in Figure 14.
Please refer to [1] for details.
Bits: 0-2
Frame
Type
3
Security
Enabled
4
Frame
Pending
5
Acknowledge
request
6
Intra
PAN
7-9
Reserved
10-11
Destination
addressing
mode
12-13
Reserved
Figure 14: Format of the Frame Control Field (FCF) [1]
14-15
Source
addressing
mode
10.6 Frame check sequence
A 2-byte frame check sequence (FCS) follows
the last MAC payload byte as shown in Figure
13. The FCS is calculated over the MPDU, i.e.
the length field is not part of the FCS.
The FCS polynomial is [1]:
x¹⁶ + x¹² + x⁵ + 1
The CC2480 hardware implementation is
shown in Figure 15. Please refer to [1] for
further details.
In transmit mode the FCS is appended at the
correct position defined by the length field.
The most significant bit in the last byte of each
frame is set high if the CRC of the received
frame is correct and low otherwise.
Data
input
(LSB
first)
r0 r1 r2 r3
r4 r5 r6 r7 r8 r9 r10
r11 r12 r13 r14 r15
Figure 15: CC2480 Frame Check Sequence (FCS) hardware implementation [1]
CC2480 Data Sheet SWRS074
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