CC2480_11 Datasheet, PDF (13/48 Pages) Texas Instruments – Z-Accel 2.4 GHz ZigBee Processor

CC2480
Parameter
Min Typ Max Unit Condition/Note
ENOB³
5.7
bits 7-bits setting.
Single ended input
7.5
9-bits setting.
9.3
10-bits setting.
ENOB^{Error! Bookmark not defined.}
10.8
12-bits setting.
6.5
bits 7-bits setting.
Differential input
8.3
9-bits setting.
10.0
10-bits setting.
11.5
12-bits setting.
Useful Power Bandwidth
THD³
-Single ended input
-Differential input
Signal To Non-Harmonic Ratio³
-Single ended input
-Differential input
Spurious Free Dynamic Range³
0-20
-75.2
-86.6
70.2
79.3
kHz 7-bits setting
dB 12-bits setting, -6dBFS
dB 12-bits setting, -6dBFS
dB 12-bits setting
dB 12-bits setting
-Single ended input
78.8
dB 12-bits setting, -6dBFS
-Differential input
88.9
dB 12-bits setting, -6dBFS
CMRR, differential input
<-84
dB 12- bit setting, 1 kHz Sine (0dBFS), limited by ADC
resolution
Crosstalk, single ended input
<-84
dB 12- bit setting, 1 kHz Sine (0dBFS), limited by ADC
resolution
Offset
-3
mV Mid. Scale
Gain error
DNL³
0.68
%
0.05
LSB 12-bits setting, mean
0.9
LSB 12-bits setting, max
INL³
4.6
LSB 12-bits setting, mean
SINAD³
13.3
LSB 12-bits setting, max
35.4
dB 7-bits setting.
Single ended input
46.8
dB 9-bits setting.
(-THD+N)
57.5
dB 10-bits setting.
SINAD^{Error! Bookmark not defined.}
66.6
dB 12-bits setting.
40.7
dB 7-bits setting.
Differential input
51.6
dB 9-bits setting.
(-THD+N)
61.8
70.8
dB 10-bits setting.
dB 12-bits setting.
Conversion time
20
µs 7-bits setting.
36
µs 9-bits setting.
68
µs 10-bits setting.
132
µs 12-bits setting.
Power Consumption
1.2
mA
CC2480 Data Sheet SWRS074A
Page 13 of 43