AM5728_15 Datasheet, PDF (304/415 Pages) Texas Instruments – AM572x SitaraTM Processors

AM5728, AM5726
SPRS915O – MARCH 2014 – REVISED OCTOBER 2015
www.ti.com
(1) H = period of baud rate, 1/programmed baud rate.
Table 7-61. Switching Characteristics Over Recommended Operating Conditions for DCANx Transmit
NO. PARAMETER
DESCRIPTION
-
f(baud)
Maximum programmable baud rate
2
t_w(DCANTX)
Pulse duration, transmit data bit (DCANx_TX)
(1) H = period of baud rate, 1/programmed baud rate.
MIN
MAX
1
H - 15 ⁽¹⁾ H + 15 ⁽¹⁾
UNIT
Mbps
ns
1
DCANx_RX
2
DCANx_TX
Figure 7-51. DCANx Timings
SPRS8xx_DCAN_01
7.22 Ethernet Interface (GMAC_SW)
The three-port gigabit ethernet switch subsystem (GMAC_SW) provides ethernet packet communication
and can be configured as an ethernet switch. It provides the Gigabit Media Independent Interface (G/MII)
in MII mode, Reduced Gigabit Media Independent Interface (RGMII), Reduced Media Independent
Interface (RMII), and the Management Data Input/Output (MDIO) for physical layer device (PHY)
management.
NOTE
For more information, see the Gigabit Ethernet Switch (GMAC_SW) section of the Device
TRM.
NOTE
The Gigabit, Reduced and Media Independent Interface n (n = 0 to 1) are also referred to as
MIIn, RMIIn and RGMIIn.
CAUTION
The IO timings provided in this section are only valid if signals within a single
IOSET are used. The IOSETs are defined in the Table 7-66, Table 7-69,
Table 7-74 and Table 7-81.
CAUTION
The IO Timings provided in this section are only valid for some GMAC usage
modes when the corresponding Virtual IO Timings or Manual IO Timings are
configured as described in the tables found in this section.
Table 7-62 and Figure 7-52 present timing requirements for MIIn in receive operation.
7.22.1 GMAC MII Timings
304 Timing Requirements and Switching Characteristics
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