TMS320C6670AXCYPA2 Datasheet, PDF (30/226 Pages) Texas Instruments – Multicore Fixed and Floating-Point System-on-Chip

TMS320C6670
Multicore Fixed and Floating-Point System-on-Chip
SPRS689D—March 2012
2.4 Boot Modes Supported and PLL Settings
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The device supports several boot processes, which leverage the internal boot ROM. Most boot processes are software
driven, using the BOOTMODE[3:0] device configuration inputs to determine the software configuration that must
be completed. From a hardware perspective, there are two possible boot modes:
• Public ROM Boot - C66x CorePac is released from reset and begins executing from the L3 ROM base address.
After performing the boot process (e.g., from I²C ROM, Ethernet, or RapidIO), the C66x CorePac then begins
execution from the L2 RAM base address.
• Secure ROM Boot - On secure devices, the C66x CorePac is released from reset and begins executing from
secure ROM. Software in the secure ROM will free up internal RAM pages, after which the C66x CorePac
initiates the boot process. The C66x CorePac performs any authentication and decryption required on the
bootloaded image prior to beginning execution.
The boot process performed by the C66x CorePac in public ROM boot and secure ROM boot is determined by the
BOOTMODE[12:0] value in the DEVSTAT register. The C66x CorePac reads this value, and then executes the
associated boot process in software. Figure 2-2 shows the bits associated with BOOTMODE[12:0]. PLL settings are
shown at the end of this section, and the PLL setup details can be found in Section 7.5 ‘‘Main PLL and the PLL
Controller’’ on page 128
Figure 2-2 Boot Mode Pin Decoding
Boot Mode Pins
12
11
10
9
8
7
6
5
PLL Mult I²C /SPI Ext Dev Cfg
Device Configuration
1 BOOTMODE[4:3] are reserved in all modes except No-Boot, Ethernet (SGMII), I²C and SPI boot mode
4
3
Reserved ⁽¹⁾
2
1
0
Boot Device
2.4.1 Boot Device Field
The Boot Device field BOOTMODE[2:0] defines the boot device that is chosen. Table 2-3 shows the supported boot
modes.
Table 2-3
Boot Mode Pins: Boot Device Values
Bit
Field
2-0 Boot Device
End of Table 2-3
Description
Device boot mode
0 = No boot
1 = Serial Rapid I/O
2 = Ethernet (SGMII) (PA driven from core clk)
3 = Ethernet (SGMII) (PA driver from PA clk)
4 = PCI
5 = I²C
6 = SPI
7 = HyperLink
30 Device Overview
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