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TMS320C6670AXCYPA2 Datasheet, PDF (17/226 Pages) Texas Instruments – Multicore Fixed and Floating-Point System-on-Chip
www.ti.com
2 Device Overview
TMS320C6670
Multicore Fixed and Floating-Point System-on-Chip
SPRS689D—March 2012
2.1 Device Characteristics
Table 2-1 provides an overview of the TMS320C6670 SoC. The table shows the significant features of the device,
including the capacity of on-chip RAM, the peripherals, the CPU frequency, and the package type with pin count.
Table 2-1
Characteristics of the C6670 SoC (Part 1 of 2)
Hardware Features
DDR3 memory controller (64-bit bus width) [1.5-V I/O]
(clock source = DDRREFCLKN|P)
EDMA3 (16 independent channels) [CPU/2 clock rate]
EDMA3 (64 independent channels) [CPU/3 clock rate]
High-speed 1×/2×/4× Serial RapidIO port (4 lanes)
Second-generation Antenna Interface (AIF2)
I2C
Peripherals
SPI
PCIe (2 lanes)
UART
10/100/1000 Ethernet
Management Data Input/Output (MDIO)
64-Bit Timers (configurable)
(internal clock source = CPU/6 clock frequency)
General-Purpose Input/Output Port (GPIO)
VCP2 (clock source = CPU/3 clock frequency)
Encoder/Decoder
Coprocessors
TCP3d (clock source = CPU/2 clock frequency)
TCP3e (clock source = CPU/3 clock frequency)
FFTC (clock source = CPU/3 clock frequency)
BCP (clock source = CPU/3 clock frequency)
Receive Accelerator (RAC)
Transmit Accelerator (TAC)
Accelerators
Rake/Search Accelerator (RSA)
Packet Accelerator (PA)
Security Accelerator (1) (SA)
Size (Bytes)
On-Chip Memory
Organization
C66x CorePac
Revision ID
JTAG BSDL_ID
Frequency
CorePac Revision ID Register (address location: 0181 2000h)
JTAGID register (address location: 0x02620018)
MHz
Cycle Time
ns
Voltage
Core (V)
I/O (V)
Copyright 2012 Texas Instruments Incorporated
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TMS320C6670
1
1
2
1
1
1
1
1
1
2
1
Eight 64-bit or Sixteen 32-bit
16
4
3
1
3
1
2
1
4
1
1
6528K
128KB L1 Program Memory Controller
[SRAM/Cache] 128KB L1 Data Memory Controller
[SRAM/Cache] 4096KB L2 Unified Memory/Cache
2048KB MSM SRAM
128KB L3 ROM
See Section 5.5 ‘‘CorePac Revision’’ on page 104.
See Section 3.3.3 ‘‘JTAG ID (JTAGID) Register
Description’’ on page 73
1200 (1.2 GHz) [-1200]
1000 (1.0 GHz) [-1000]
0.83 ns [-1200]
1 ns [-1000]
SmartReflex variable supply
1.0 V, 1.5 V, and 1.8 V
Device Overview 17