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LM3S8930 Datasheet, PDF (30/550 Pages) Texas Instruments – Stellaris® LM3S8930 Microcontroller | |||
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Architectural Overview
â Master or slave operation
â Programmable clock bit rate and prescale
â Separate transmit and receive FIFOs, 16 bits wide, 8 locations deep
â Programmable interface operation for Freescale SPI, MICROWIRE, or Texas Instruments
synchronous serial interfaces
â Programmable data frame size from 4 to 16 bits
â Internal loopback test mode for diagnostic/debug testing
â I2C
â Devices on the I2C bus can be designated as either a master or a slave
⢠Supports both sending and receiving data as either a master or a slave
⢠Supports simultaneous master and slave operation
â Four I2C modes
⢠Master transmit
⢠Master receive
⢠Slave transmit
⢠Slave receive
â Two transmission speeds: Standard (100 Kbps) and Fast (400 Kbps)
â Master and slave interrupt generation
⢠Master generates interrupts when a transmit or receive operation completes (or aborts
due to an error)
⢠Slave generates interrupts when data has been sent or requested by a master
â Master with arbitration and clock synchronization, multimaster support, and 7-bit addressing
mode
â Controller Area Network (CAN)
â Two CAN modules, each with the following features:
â CAN protocol version 2.0 part A/B
â Bit rates up to 1 Mbps
â 32 message objects with individual identifier masks
â Maskable interrupt
â Disable Automatic Retransmission mode for Time-Triggered CAN (TTCAN) applications
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June 22, 2010
Texas Instruments-Production Data
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