SLUA159 Datasheet, PDF (3/28 Pages) Texas Instruments – Zero Voltage Switching Resonant Power Conversion

APPLICATION NOTE
n Reduced gate drive requirements (no
“Miller” effects)
Short circuit tolerant
ZVS Differences:
n Variable frequency operation (in general)
q Higher off-state voltages in single switch,
unclamped topologies
W Relatively new technology - users must climb
the learning curve
W Conversion frequency is inversely propor-
tional to load current
w A more sophisticated control circuit may be
required
ZVS Design Equations
A zero voltage switched Buck regulator
will be used to develop the design equations
for the various voltages, currents and time
intervals associated with each of the conversion
periods which occur during one complete
switching cycle. The circuit schematic, compo-
nent references, and relevant polarities are
shown in Fig. 4.
Typical design procedure guidelines and
“shortcuts” will be employed during the anal-
ysis’ for the purpose of brevity. At the onset,
all components will be treated as though they
were ideal which simplifies the generation of
the basic equations and relationships. As this
section progresses, losses and non-ideal charac-
teristics of the components will be added to the
formulas. The timing summary will expound
upon the equations for a precise analysis.
Another valid assumption is that the output
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filter section consisting of output inductor L.,,,
and capacitor C_O has a time constant several
orders of magnitude larger than any power
conversion period. The filter inductance is large
in comparison to that of the resonant inductor’s
value L, and the magnetizing current ML., as
well as the inductor’s DC resistance is negligi-
ble. In addition, both the input voltage VjN and
output voltage V. are purely DC, and do not
vary during a given conversion cycle. Last, the
converter is operating in a closed loop configu-
ration which regulates the output voltage V. .
Initial Conditions: Time interval < +,
Before analyzing the individual time inter-
vals, the initial conditions of the circuit must be
defined. The analysis will begin with switch Q,
on, conducting a drain current ZD equal to the
output current I_O, and VDs = VCR = 0 (ideal).
In series with the switch Q, is the resonant
inductor L, and the output inductor L, which
also conduct the output current I,. It has been
established that the output inductance L, is
large in comparison to the resonant inductor
L, and all components are ideal. Therefore, the
voltage across the output inductor V’ equals
the input to output voltage differential; I/Lo =
VIN - V_O. The output filter section catch diode
D_O is not conducting and sees a reverse voltage
equal to the input voltage; V’ = V,, observing
the polarity shown in Figure 4.
Table I - INITIAL CONDITIONS
Fig. 4 - Zero Voltage Switched Buck Regulator
Capacitor Charging State: to - t,
The conversion period is initiated at time t,
when switch Q, is turned OFF. Since the
current through resonant inductor L, and
output inductor L, cannot change instanta-
neously, and no drain current flows in Q, while
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