DDC112Y Datasheet, PDF (3/34 Pages) Texas Instruments – Dual Current Input 20-Bit ANALOG-TO-DIGITAL CONVERTER

ELECTRICAL CHARACTERISTICS
At T_A = +25°C, AV_DD = DV_DD = +5V, DDC112U, Y: T_INT = 500µs, CLK = 10MHz, DDC112UK, YK: T_INT = 333.3µs, CLK = 15MHz, V_REF = +4.096V, continuous mode
operation, and internal integration capacitors, unless otherwise noted.
PARAMETER
CONDITIONS
DDC112U, Y
MIN
TYP
MAX
DDC112UK, YK
MIN
TYP
MAX
UNITS
ANALOG INPUTS
External, Positive Full-Scale
Range 0
Internal, Positive Full-Scale
Range 1
Range 2
Range 3
Range 4
Range 5
Range 6
Range 7
Negative Full-Scale Input
DYNAMIC CHARACTERISTICS
Conversion Rate
Integration Time, T_INT
Integration Time, T_INT
System Clock Input (CLK)
Data Clock (DCLK)
ACCURACY
Noise, Low-Level Current Input⁽¹⁾
Differential Linearity Error
C_EXT = 250pF
Continuous Mode
Non-Continuous Mode
C_SENSOR(2) = 0pF, Range 5 (250pC)
C_SENSOR = 25pF, Range 5 (250pC)
C_SENSOR = 50pF, Range 5 (250pC)
Integral Linearity Error⁽⁴⁾
No Missing Codes
Input Bias Current
Range Error
Range Error Match⁽⁵⁾
Range Sensitivity to V_REF
Offset Error
Offset Error Match⁽⁵⁾
DC Bias Voltage⁽⁶⁾ (Input V_OS)
Power-Supply Rejection Ratio
Internal Test Signal
Internal Test Accuracy
T_A = +25°C
Range 5 (250pC)
All Ranges
V_REF = 4.096 ±0.1V
Range 5, (250pC)
PERFORMANCE OVER TEMPERATURE
Offset Drift
Offset Drift Stability
DC Bias Voltage Drift
Applied to Sensor Input
Input Bias Current Drift
+25°C to +45°C
Input Bias Current
Range Drift⁽⁷⁾
T_A = +75°C
Range 5 (250pC)
Range Drift Match⁽⁵⁾
Range 5 (250pC)
REFERENCE
Voltage
Input Current⁽⁸⁾
DIGITAL INPUT/OUTPUT
Logic Levels
V_IH
V_IL
V_OH
V_OL
Input Current, I_IN
Data Format⁽⁹⁾
T_INT = 500µs
I_OH = –500µA
I_OL = 500µA
POWER-SUPPLY REQUIREMENTS
Power-Supply Voltage
Supply Current
Analog Current
Digital Current
Total Power Dissipation
AV_DD and DV_DD
AV_DD = +5V
DV_DD = +5V
TEMPERATURE RANGE
Specified Performance
Storage
1000
47.5
50
52.5
95
100
105
142.5
150
157.5
190
200
210
237.5
250
262.5
285
300
315
332.5
350
367.5
–0.4% of Positive FS
2
500
1,000,000
50
1
10
12
12
3.2
3.8
4.2
6.0
±0.005% Reading ±0.5ppm
FSR (max)
±0.005% Reading ±0.5ppm
FSR (typ)
±0.025% Reading ±1.0ppm
FSR (max)
20
0.1
10
5
0.1
0.5
1:1
±200
±100
±0.05
±2
±25
±200
13
±10
±0.5
±0.2
3
0.01
2
25
±0.05
1⁽¹⁰⁾
50⁽¹⁰⁾
4.000
4.096
150
4.200
4.0
–0.3
DV_DD + 0.3
+0.8
4.5
0.4
–10
+10
Straight Binary
4.75
5.25
14.8
1.2
80
100
–40
+85
–60
+100
✻
✻
✻
✻
✻
✻
✻
333.3
✻
✻
0
✻
✻
✻
✻
✻
✻
0
✻
✻
pC
✻
✻
pC
✻
✻
pC
✻
✻
pC
✻
✻
pC
✻
✻
pC
✻
✻
pC
✻
✻
pC
✻
pC
3
✻
✻
15
15
kHz
µs
µs
MHz
MHz
✻
ppm of FSR⁽³⁾, rms
✻
ppm of FSR, rms
✻
7 ppm of FSR, rms
✻
✻
✻
✻
Bits
✻
✻
pA
✻
% of FSR
✻
✻
% of FSR
✻
✻
±600
ppm of FSR
✻
ppm of FSR
✻
✻
mV
✻
✻
ppm of FSR/V
✻
pC
✻
%
±3⁽¹⁰⁾ ppm of FSR/°C
✻
±0.7⁽¹⁰⁾ ppm of FSR/minute
±1
µV/°C
✻
✻
pA/°C
✻
✻
pA
25
50⁽¹⁰⁾
ppm/°C
✻
ppm/°C
✻
✻
V
225
275
µA
✻
V
✻
V
V
✻
V
✻
µA
✻
✻
V
15.2
mA
1.8
mA
85
130
mW
+70
°C
✻
°C
✻ Specifications same as DDC112U, Y.
NOTES: (1) Input is less than 1% of full scale. (2) C_SENSOR is the capacitance seen at the DDC112 inputs from wiring, photodiode, etc. (3) FSR is Full-Scale Range.
(4) A best-fit line is used in measuring linearity. (5) Matching between side A and side B, not input 1 to input 2. (6) Voltage produced by the DDC112 at its input which
is applied to the sensor. (7) Range drift does not include external reference drift. (8) Input reference current decreases with increasing T_INT (see the Voltage Reference
section). (9) Data format is Straight Binary with a small offset (see the Data Retrieval section). (10) Ensured by design but not production tested.
DDC112
3
SBAS085B
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