BQ24072 Datasheet, PDF (3/38 Pages) Texas Instruments – 1.2A USB-FRIENDLY Li-Ion BATTERY CHARGER AND POWER-PATH MANAGEMENT IC

bq24072, bq24073
bq24074, bq24075
www.ti.com...................................................................................................................................... SLUS810A – SEPTEMBER 2008 – REVISED DECEMBER 2008
DISSIPATION RATINGS
PACKAGE ⁽¹⁾
RGT ⁽²⁾
R_θJA
39.47 °C/W
R_θJC
2.4 °C/W
POWER RATING
T_A ≤ 25°C
2.3 W
T_A = 85°C
225mW
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) This data is based on using the JEDEC High-K board and the exposed die pad is connected to a Cu pad on the board. The pad is
connected to the ground plane by a 2x3 via matrix.
RECOMMENDED OPERATING CONDITIONS
V_I
I_IN
I_OUT
I_BAT
I_CHG
T_J
R_ILIM
R_ISET
R_ITERM
R_TMR
IN voltage range
IN operating voltage range
’72, ’73, ‘75
‘74
Input current, IN pin
Current, OUT pin
Current, BAT pin (Discharging)
Current, BAT pin (Charging)
Junction Temperature
Maximum input current programming resistor
Fast-charge current programming resistor ⁽²⁾
Termination current programming resistor
Timer programming resistor
MIN
4.35
4.35
4.35
–40
1100
590
0
18
MAX
26
6.4
10.2
1.5
4.5
4.5
1.5 ⁽¹⁾
125
8000
3000
15
72
UNIT
V
V
A
A
A
A
°C
Ω
Ω
kΩ
kΩ
(1) The IC operational charging life is reduced to 20,000 hours, when charging at 1.5A and 125°C. The thermal regulation feature reduces
charge current if the IC’s junction temperature reaches 125°C; thus without a good thermal design the maximum programmed charge
current may not be reached.
(2) Use a 1% tolerance resistor for R_ISET to avoid issues with the R_ISET short test when using the maximum charge current setting.
ELECTRICAL CHARACTERISTICS
Over junction temperature range (0° ≤ T_J ≤ 125°C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
INPUT
UVLO
V_hys
V_IN(DT)
V_hys
t_DGL(PGOOD)
Undervoltage lock-out
Hysteresis on UVLO
Input power detection threshold
Hysteresis on V_IN(DT)
Deglitch time, input power detected
status
V_IN: 0 V → 4 V
V_IN: 4 V → 0 V
Input power detected when V_IN > V_BAT + V_IN(DT)
V_BAT = 3.6 V, VIN: 3.5 V → 4 V
V_BAT = 3.6 V, V_IN: 4 V → 3.5 V
Time measured from V_IN: 0 V → 5 V 1 µs
rise-time to PGOOD = LO
3.2
3.3
3.4 V
200
300 mV
55
80
130 mV
20
mV
4
ms
V_OVP
V_hys
t_DGL(OVP)
Input overvoltage protection threshold
Hysteresis on OVP
Input overvoltage blanking time (OVP
fault deglitch)
(’72, ’73, ’75) V_IN: 5 V → 7 V
(’74) V_IN: 5 V → 11 V
(’72, ’73, ’75) V_IN: 7 V → 5V
(’74) V_IN: 11 V → 5 V
6.4
6.6
6.8
V
10.2
10.5
10.8
110
mV
175
50
µs
t_REC
Input overvoltage recovery time
Time measured from V_IN: 11 V → 5 V with 1 µs
fall-time to PGOOD = LO
2
ms
ILIM, ISET SHORT CIRCUIT DETECTION (CHECKED DURING STARTUP)
I_SC
Current source
V_SC
V_IN > UVLO and V_IN > V_BAT + V_IN(DT)
V_IN > UVLO and V_IN > V_BAT + V_IN(DT)
1.3
mA
520
mV
Copyright © 2008, Texas Instruments Incorporated
Submit Documentation Feedback
3
Product Folder Link(s): bq24072 bq24073 bq24074 bq24075