TLE2161 Datasheet, PDF (28/29 Pages) Texas Instruments – EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE mPOWER OPERATIONAL AMPLIFIERS

TLE2161, TLE2161A, TLE2161B
EXCALIBUR JFET-INPUT HIGH-OUTPUT-DRIVE
µPOWER OPERATIONAL AMPLIFIERS
SLOS049D – NOVEMBER 1989 – REVISED MAY 1996
APPLICATION INFORMATION
input characteristics
The TLE2161, TLE2161A and TLE2161B are specified with a minimum and a maximum input voltage that if
exceeded at either input could cause the device to malfunction.
Because of the extremely high input impedance and resulting low bias-current requirements, the TLE2161,
TLE2161A, and TLE2161B are well suited for low-level signal processing; however, leakage currents on printed
circuit boards and sockets can easily exceed bias-current requirements and cause degradation in system
performance. It is a good practice to include guard rings around inputs (see Figure 38). These guards should
be driven from a low-impedance source at the same voltage level as the common-mode input.
VI
+
–
R2
R1
VO
VI
R3
+
VO
–
R4
+ Where
R3
R4
R2
R1
Figure 38. Use of Guard Rings
input offset voltage nulling
The TLE2161 series offers external null pins that can further reduce the input offset voltage. The circuit in
Figure 39 can be connected as shown if the feature is desired. When external nulling is not needed, the null
pins may be left disconnected.
IN – –
IN + ⁺
OUT
N2
N1
100 kΩ
5 kΩ
VCC _–
Figure 39. Input Offset Voltage Nulling
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