MSP430G2X21 Datasheet, PDF (27/61 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430G2x21, MSP430G2x31
MIXED SIGNAL MICROCONTROLLER
SLAS694B -- FEBRUARY 2010 -- REVISED MAY 2010
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (continued)
crystal oscillator, LFXT1, low frequency modes (see Note 4)
f_LFXT1,LF
PARAMETER
LFXT1 oscillator crystal
frequency, LF mode 0, 1
TEST CONDITIONS
XTS = 0, LFXT1Sx = 0 or 1
V_CC
1.8 V to 3.6 V
MIN TYP
32768
MAX UNIT
Hz
f_{LFXT1,LF,logic}
LFXT1 oscillator logic level
square wave input frequency,
LF mode
XTS = 0, XCAPx = 0,
LFXT1Sx = 3
1.8 V to 3.6 V 10000 32768 50000 Hz
OA_LF
C_L,eff
Oscillation allowance for
LF crystals
Integrated effective load
capacitance, LF mode
(see Note )
XTS = 0, LFXT1Sx = 0,
f_LFXT1,LF = 32,768 kHz,
C_L,eff = 6 pF
XTS = 0, LFXT1Sx = 0,
f_LFXT1,LF = 32,768 kHz,
C_L,eff = 12 pF
XTS = 0, XCAPx = 0
XTS = 0, XCAPx = 1
XTS = 0, XCAPx = 2
XTS = 0, XCAPx = 3
500
kΩ
200
1
5.5
pF
8.5
11
Duty cycle LF mode
f_Fault,LF
Oscillator fault frequency,
LF mode (see Note 3)
XTS = 0,
Measured at P2.0/ACLK,
f_LFXT1,LF = 32,768Hz
XTS = 0, XCAPx = 0.
LFXT1Sx = 3 (see Note 2)
2.2 V
2.2 V
30
50
70 %
10
10000 Hz
NOTES: 1. Includes parasitic bond and package capacitance (approximately 2 pF per pin).
Since the PCB adds additional capacitance it is recommended to verify the correct load by measuring the ACLK frequency. For a
correct setup the effective load capacitance should always match the specification of the used crystal.
2. Measured with logic level input frequency but also applies to operation with crystals.
3. Frequencies below the MIN specification set the fault flag, frequencies above the MAX specification do not set the fault flag, and
frequencies in between might set the flag.
4. To improve EMI on the LFXT1 oscillator the following guidelines should be observed.
-- Keep the trace between the device and the crystal as short as possible.
-- Design a good ground plane around the oscillator pins.
-- Prevent crosstalk from other clock or data lines into oscillator pins XIN and XOUT.
-- Avoid running PCB traces underneath or adjacent to the XIN and XOUT pins.
-- Use assembly materials and praxis to avoid any parasitic load on the oscillator XIN and XOUT pins.
-- If conformal coating is used, ensure that it does not induce capacitive/resistive leakage between the oscillator pins.
-- Do not route the XOUT line to the JTAG header to support the serial programming adapter as shown in other
documentation. This signal is no longer required for the serial programming adapter.
internal very low power, low frequency oscillator (VLO)
f_VLO
df_VLO/dT
PARAMETER
VLO frequency
VLO frequency
temperature drift
TEST CONDITIONS
T_A
-40 -- 85°C
-40 -- 85°C
df_VLO/dV_CC
VLO frequency supply
voltage drift
25°C
V_CC
3.0 V
3.0 V
1.8 V -- 3.6 V
MIN TYP MAX UNIT
4
12
20 kHz
0.5
%/°C
4
%/V
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