MSP430G2X21 Datasheet, PDF (11/61 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430G2x21, MSP430G2x31
MIXED SIGNAL MICROCONTROLLER
SLAS694B -- FEBRUARY 2010 -- REVISED MAY 2010
special function registers
Most interrupt and module enable bits are collected into the lowest address space. Special function register bits
not allocated to a functional purpose are not physically present in the device. Simple software access is provided
with this arrangement.
interrupt enable 1 and 2
Address
0h
WDTIE:
OFIE:
NMIIE:
ACCVIE:
7
6
5
4
3
2
1
0
ACCVIE
NMIIE
OFIE
WDTIE
rw-0
rw-0
rw-0
rw-0
Watchdog Timer interrupt enable. Inactive if watchdog mode is selected. Active if Watchdog Timer
is configured in interval timer mode.
Oscillator fault enable
(Non)maskable interrupt enable
Flash access violation interrupt enable
Address
7
6
5
4
3
2
1
0
01h
interrupt flag register 1 and 2
Address
02h
WDTIFG:
OFIFG:
RSTIFG:
PORIFG:
NMIIFG:
7
6
5
4
3
2
1
0
NMIIFG
RSTIFG
PORIFG
OFIFG
WDTIFG
rw-0
rw-(0)
rw-(1)
rw-1
rw-(0)
Set on Watchdog Timer overflow (in watchdog mode) or security key violation.
Reset on V_CC power-up or a reset condition at RST/NMI pin in reset mode.
Flag set on oscillator fault
External reset interrupt flag. Set on a reset condition at RST/NMI pin in reset mode. Reset on V_CC
power-up
Power-On Reset interrupt flag. Set on V_CC power-up.
Set via RST/NMI-pin
Address
7
6
5
4
3
2
1
0
03h
Legend
rw:
rw-0,1:
rw-(0,1):
Bit can be read and written.
Bit can be read and written. It is Reset or Set by PUC.
Bit can be read and written. It is Reset or Set by POR.
SFR bit is not present in device
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