TLC2942 Datasheet, PDF (26/28 Pages) Texas Instruments – HIGH-PERFORMANCE DUAL PHASE-LOCKED LOOP BUILDING BLOCK

TLC2942
HIGH-PERFORMANCE DUAL PHASE-LOCKED LOOP BUILDING BLOCK
SLAS146B – NOVEMBER 1996 – REVISED JUNE 1997
APPLICATION INFORMATION
PCB layout considerations
The TLC2942I contains high frequency analog oscillators; therefore, very careful breadboarding and
printed-circuit-board (PCB) layout is required for evaluation.
The following design recommendations benefit the TLC2942I user:
D External analog and digital circuitry should be physically separated and shielded as much as possible to
reduce system noise.
D RF breadboarding or RF PCB techniques should be used throughout the evaluation and production
process.
D Wide ground leads or a ground plane should be used on the PCB layouts to minimize parasitic inductance
and resistance. The ground plane is the better choice for noise reduction.
D LOGIC V_DD and VCO V_DD should be separate PCB traces and connected to the best filtered supply point
available in the system to minimize supply cross-coupling.
D VCO V_DD to GND and LOGIC V_DD to GND should be decoupled with a 0.1-µF capacitor placed as close
as possible to the appropriate device terminals.
D The no-connection (NC) terminal on the package should be connected to GND.
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