THS4032IDR Datasheet, PDF (26/47 Pages) Texas Instruments – 100-MHz LOW-NOISE HIGH-SPEED AMPLIFIERS

THS4031
THS4032
SLOS224G – JULY 1999 – REVISED MARCH 2010
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OFFSET NULLING
The THS403x has very low input offset voltage for a high speed amplifier. However, if additional correction is
required, the designer can make use of an offset nulling function provided on the THS4031. By placing a
potentiometer between terminals 1 and 8 of the device and tying the wiper to the negative supply, the input offset
can be adjusted. This is shown in Figure 56.
V_CC+
3
+
7
THS4031
2_{_}
4
8
1 _{10 k Ω}
0.1 mF
0.1 mF
V_CC −
Figure 56. Offset Nulling Schematic
OFFSET VOLTAGE
The output offset voltage (V_OO) is the sum of the input offset voltage (V_IO) and both input bias currents (I_IB) times
the corresponding gains. The following schematic and formula can be used to calculate the output offset voltage:
Figure 57. Output Offset Voltage Model
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