CC2550_06 Datasheet, PDF (26/55 Pages) Texas Instruments – Single Chip Low Cost Low Power RF Transmitter

CC2550
Figure 17 shows the number of bytes in the TX
FIFO when the threshold flag toggles, in the
case of FIFO_THR=13. Figure 16 shows the
flag as the FIFO is filled above the threshold,
and then drained below.
FIFO_THR
0 (0000)
1 (0001)
2 (0010)
3 (0011)
4 (0100)
5 (0101)
6 (0110)
7 (0111)
8 (1000)
9 (1001)
10 (1010)
11 (1011)
12 (1100)
13 (1101)
14 (1110)
15 (1111)
Bytes in TX FIFO
61
57
53
49
45
41
37
33
29
25
21
17
13
9
5
1
Table 19: FIFO_THR settings and the
corresponding FIFO thresholds
NUM_TXBYTES 6 7 8 9 10 9 8 7 6
GDO
Figure 16: FIFO_THR=13 vs. number of bytes
in FIFO (GDOx_CFG=0x02)
FIFO_THR=13
Underflow
margin
8 bytes
TXFIFO
Figure 17: Example of FIFO at threshold
18 Frequency Programming
The frequency programming in CC2550 is
designed to minimize the programming
needed in a channel-oriented system.
To set up a system with channel numbers, the
desired channel spacing is programmed with
the
MDMCFG0.CHANSPC_M
and
MDMCFG1.CHANSPC_E registers. The channel
spacing registers are mantissa and exponent
respectively.
The base or start frequency is set by the 24 bit
frequency word located in the FREQ2, FREQ1
and FREQ0 registers. This word will typically
be set to the centre of the lowest channel
frequency that is to be used.
The desired channel number is programmed
with the 8-bit channel number register,
CHANNR.CHAN, which is multiplied by the
channel offset. The resultant carrier frequency
is given by:
( ( )) ( ) f_carrier =
f _XOSC
2¹⁶
⋅
FREQ
+ CHAN
⋅
256 + CHANSPC _ M
⋅ 2^{CHANSPC _ E−2}
With a 26 MHz crystal the maximum channel
spacing is 405 kHz. To get e.g. 1 MHz channel
spacing one solution is to use 333 kHz
channel spacing and select each third channel
in CHANNR.CHAN.
PRELIMINARY Data Sheet (Rev.1.2) SWRS039A
Page 26 of 54