BQ27210 Datasheet, PDF (26/30 Pages) Texas Instruments – Li-Ion AND Li-Pol BATTERY GAS GAUGE IC FOR PORTABLE APPLICATIONS (bqJUNIOR)

bq27010, bq27210
SLUS707B – APRIL 2006 – REVISED JANUARY 2007
www.ti.com
The communication protocol is asynchronous return-to-one and is referenced to V_SS. Command and data bytes
consist of a stream of eight bits that have a maximum transmission rate of 5 Kbits/s. The least-significant bit of a
command or data byte is transmitted first. Data input from the bqJUNIOR can be sampled using the pulse-width
capture timers available on some microcontrollers. A UART can also be configured to communicate with the
bq27010.
If a communication timeout occurs (for example, if the host waits longer than T_(RSPS) for the bq27010 to respond)
or if this is the first access command, then a BREAK should be sent by the host. The host may then resend the
command. The bq27010 detects a BREAK when the HDQ pin is driven to a logic-low state for a time T_(B) or
greater. The HDQ pin then returns to its normal ready-high logic state for a time T_(BR).The bq27010 is then ready
for a command from the host processor.
The return-to-one data-bit frame consists of three distinct sections:
1. The first section starts the transmission by either the host or the bq27010 taking the HDQ pin to a
logic-low state for a period equal to T_(HW1) or T_(DW1).
2. The next section is the actual data transmission, where the data should be valid for T_(HW0)- T_(HW1) or
T_(DW0)- T_(DW1).
3. The final section stops the transmission by returning the HDQ pin to a logic-high state and holding it high
until the time from bit start to bit end is equal to T_(CYCH) or T_(CYCD).
The HDQ line can remain high for an indefinite period of time between each bit of address or between each bit
of data on a write cycle. After the last bit of address is sent on a read cycle, the bq27010 starts outputting the
data after T_(RSPS) with timing as specified. The serial communication timing specification and illustration sections
give the timings for data and break communication. Communication with the bq27010 always occurs with the
least-significant bit being transmitted first.
Plugging in the battery pack can be seen as the start of a communication due to contact bounce. It is
recommended that each communication or string of communications be preceded by a break to reset the HDQ
engine.
Command byte
The Command byte of the bqJUNIOR consists of eight contiguous valid command bits. The command byte
contains two fields: W/R Command and address. The Command byte values are shown as follows:
7
6
5
4
3
2
1
0
W/R
AD6
AD5
AD4
AD3
AD2
AD1
AD0
W/R
Indicates whether the command bytes is a read or write command. A 1 indicates a write command
and that the following eight bits should be written to the register specified by the address field of
the Command byte, whereas a 0 indicates that the command is a read. On a read command, the
bqJUNIOR outputs the requested register contents specified by the address field portion of the
Command byte.
AD6-AD0 The seven bits labeled AD6—AD0 containing the address portion of the register to be accessed.
Reading 16-bit Registers
Because 16-bit values are read only 8 bits at a time with the HDQ interface, it is possible that the device can
update the register value between the time the host reads the first and second bytes. To prevent any system
issues, any 16-bit values read by the host should be read with the following procedure.
1. Read high byte (H0).
2. Read low byte (L0).
3. Read high byte (H1).
4. If H1=H0, then valid result is H0, L0.
5. Otherwise, read low byte (L1) and valid result is H1, L1.
This procedure assumes that the 3 or 4 reads are made more quickly than the update rate of the value. The
maximum update rate of any value in the bq27010/bq27210 is 1.28 seconds.
The bq27210 circumvents this issue if a 16-bit value is read using the I²C incremental read procedure. Both low
and high bytes are captured simultaneously when the low byte is read.
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