LM3555TLE Datasheet, PDF (25/33 Pages) Texas Instruments – LM3555 Synchronous Boost Converter with 500 mA High Side LED Driver and Dual-Mode Control Interface

LM3555
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SNVS594E – JANUARY 2009 – REVISED NOVEMBER 2011
Following the setting of the SEN and OEN bits, the user must chose to have an edge-sensitive or level-sensitive
strobe event. Writing a '1' to the Strobe Signal Usage (SSU) bit in the Control Register (Address 0x04), the
LM3555 will be configured to be level sensitive, while writing a '0' configures the part to be edge sensitive. In
both cases, the strobe flash event is started upon the Strobe pin being driven high.
In an edge-sensitive event, the flash duration will stay active until the flash duration timer lapses regardless of
the state of the Strobe pin. If a level-sensitive strobe is used, the flash event will remain active as long as the
Strobe pin is held high and as long as the flash duration time has not lapsed.
In I²C Control mode, the end of a flash event, whether initiated through the Control Register or Strobe pin, will
force the OEN bit to a '0' and will place the LM3555 back into the Standby state.
INDICATOR OPERATION
Indicator mode is enabled in Simple Control mode by driving EN1 high ('1') and by driving EN2 high ('0'). In I²C
control mode, Indicator mode is enabled by setting the Output Mode bits (OM1 and OM0) to '01' and setting the
Output Enable bit (OEN) to a '1' in the Control Register (0x04). Indicator mode will remain active in I²C mode
until the OEM bit is set to '0' or until a torch or flash event occurs.
In Simple Control Mode, the indicator LED current is fixed to 2.5 mA, while in I²C Control mode, the indicator
current is adjustable to 2.5 mA, 5 mA, 7.5 mA or 10 mA by changing the values of the IC1 and IC0 bits in the
Indicator and Timer Register (Address 0x02).
FAULT PROTECTIONS
The LM3555 has a number of fault protection mechanisms designed to not only protect the LM3555 itself, but
also the rest of the system. Active faults protections include:
• Over-Voltage Protection (VOUT)
• Short-Circuit Protection (VOUT and VLED)
• Over-Temperature Protection
• Flash Timeout
• Indicator LED Protection (Open and Short)
• Broken Inductor Protection
In the event that any of these faults occur, the LM3555 will set a flag in the Fault Register (Address 0x05) and
place the part into standby or shutdown. In Simple Control Mode, normal operation cannot resume until the fault
has been fixed and until EN1 and EN2 are driven low '0'. In I²C Control Mode, normal operation cannot resume
until the fault has be fixed and until an I²C read of the faults register (0x05) has completed. The act of reading
the fault register clears the fault bits.
Output Over-Voltage Protection (OVP)
An OVP fault is triggered when the output voltage of the LM3555 reaches a value greater than 9.5V (typ.). The
OVP condition is cleared when the output voltage (V_OUT) is able to operate below 9.5V. An output capacitor or an
LED that have become an open circuit can cause an OVP event to occur. This fault is reported to the OVP fault
bit in the Fault Register (bit7 in address 0x05).
Output and LED Short Circuit Protection (SCP)
An SCP fault is triggered when the output voltage (VOUT) and/or the VLED pin does not reach 0.8V in 0.5 ms.
The short circuit condition is cleared when the output (VOUT) is allowed to reach its steady state target and
when the LED_OUT voltage rises above 0.8V. A shorted output capacitor or a shorted LED could cause this fault
to occur. This fault is reported to the SC fault bit in the Fault Register (bit6 in address 0x05).
Over-Temperature Protection (OTP)
An OTP fault is triggered when the diode junction temperature of the LM3555 reaches an internal temperature of
around 150°C. The OTP condition is cleared when the junction temperature falls below 140°C. A printed circuit
board (PCB) with poor thermal dissipation properties and very high ambient temperatures (greater that 85°C)
could cause this fault to occur. Please refer to Texas Instruments Application Note: AN-1112: Micro SMD Wafer
Level Chip Scale Package for more information regarding proper PCB layout. This fault is reported to the OTP
fault bit in the Fault Register (bit5 in address 0x05).
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