BQ27505-J4 Datasheet, PDF (25/38 Pages) Texas Instruments – System-Side Impedance Track™ Fuel Gauge

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bq27505-J4
SLVSA40 – DECEMBER 2009
5.2.10 Avg I Last Run
The bq27505-J4 logs the current averaged from the beginning to the end of each discharge cycle. It stores
this average current from the previous discharge cycle in this register. This register should never need to
be modified. It is only updated by the bq27505-J4 when required.
5.2.11 Avg P Last Run
The bq27505-J4 logs the power averaged from the beginning to the end of each discharge cycle. It stores
this average power from the previous discharge cycle in this register. To get a correct average power
reading the bq27505-J4 continuously multiplies instantaneous current times Voltage( ) to get power. It
then logs this data to derive the average power. This register should never need to be modified. It is only
updated by the bq27505-J4 when required.
5.2.12 Delta Voltage
The bq27505-J4 stores the maximum difference of Voltage( ) during short load spikes and normal load, so
the Impedance Track™ algorithm can calculate remaining capacity for pulsed loads. This behavior can be
modified by setting bits 0 and 1 of the Data flash register Debug Options as follows:
Bit1 Bit0
Delta V Selection
Description
0
0
Standard
Average variance from steady state voltage used to determine end of discharge voltage
0
1
No Averaging
Last instantaneous change in voltage from steady state used to determine end of discharge
voltage
1
0
Minimum Delta V
Value in Min Delta Voltage used
1
1
unused
5.2.13 Default Ra and Ra Tables
These tables contain encoded data and, with the exception of the Default Ra Tables, are automatically
updated during device operation. No user changes should be made except for reading/writing the values
from a pre-learned pack (part of the process for creating golden image files).
5.3 DETAILED PIN DESCRIPTION
5.3.1 The Operation Configuration Register
Some bq27505-J4 pins are configured via the Operation Configuration data flash register, as indicated
in Table 5-3. This register is programmed/read via the methods described in ACCESSING THE DATA
FLASH. The register is located at subclass = 64, offset = 0.
Copyright © 2009, Texas Instruments Incorporated
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FUNCTIONAL DESCRIPTION
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