DRV411_15 Datasheet, PDF (23/34 Pages) Texas Instruments – Sensor Signal Conditioning IC for Closed-Loop Magnetic Current Sensors

DRV411
www.ti.com
SBOS693B – AUGUST 2013 – REVISED DECEMBER 2013
LAYOUT CONSIDERATIONS
The DRV411 operates with relatively large currents and offers wide bandwidth. It is often exposed to large
distortion energy from the primary signal and from the environment. Therefore, the wiring layout must provide
shielding and low impedance connections between critical points. Power-supply decoupling requires low-ESR
capacitors, and eventually a combination of a 4.7-nF NP0-type capacitor and a second capacitor of 1 µF or
larger. Use low-impedance tracks to connect the capacitors to the pins. Avoid plated through-hole connectors;
use multiple plated through-holes instead. The ground (GND) should be connected to a local ground plane. Best
supply decoupling is achieved with ferrite beads in series to the main supply. The ferrite beads decouple the
DRV411, and thus reduce interaction with other circuits powered from the same supply voltage source.
The reference output (REFOUT) is referred to GND. A low-impedance and star-type connection is required to
avoid the driver current and the probe current modulating the voltage drop on the ground track. The REFOUT
and VOUT outputs can drive some capacitive load, but avoid large direct capacitive loading because it increases
internal pulse currents. Given the wide bandwidth of the differential amplifier, isolate large capacitive loads with a
small series resistor. Using a small capacitor of some pF improves the transient response on high resistive loads.
The exposed thermal pad, or PowerPAD, on the bottom of the package must be soldered to GND because it is
internally connected to the substrate that must be connected to the most negative potential.
POWER DISSIPATION
The use of the thermally-enhanced PowerPAD SOIC and QFN packages dramatically reduces the thermal
impedance from junction to case. These packages are constructed using a down-set lead frame that the die is
mounted on. This arrangement results in the lead frame being exposed as a thermal pad on the underside of the
package. The PowerPAD has direct thermal contact with the die; therefore, excellent thermal performance can
be achieved as a result of providing a good thermal path away from the thermal pad.
The two outputs, ICOMP1 and ICOMP2, are linear outputs, and therefore the power dissipation on each output is
proportional to the current multiplied by the internal voltage drop on the active transistor. For ICOMP1 and
ICOMP2, it is the voltage drop to VDD or GND according to the current-conducting side of the output.
CAUTION
Output short-circuit conditions are particularly critical for the ICOMP driver because the
full supply voltage can be seen across the conducting transistor and the current is not
limited other than by the current density limitation of the FET; permanent damage can
occur. The DRV411 does not feature temperature protection or thermal shut-down.
Thermal Pad
Packages with an exposed thermal pad are specifically designed to provide excellent power dissipation, but
board layout greatly influences the overall heat dissipation. Technical details are described in Application Report
SLMA002, PowerPad Thermally Enhanced Package, available for download at www.ti.com.
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: DRV411
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