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PCI7510 Datasheet, PDF (229/234 Pages) Texas Instruments – PC Card, Smart Card and Integrated
Recommended Operating Conditions (continued)
VIH†
VIL†
VI
VO§
tt
IO
VID
VIC
tPU
TA
TJ#
OPERATION
MIN
NOM
MAX
High-level input
voltage
PCI
PC Card
PC(0–2)
Miscellaneous‡
PCI
Low-level input voltage PC Card
PC(0–2)
Miscellaneous‡
3.3 V
5V
3.3 V CardBus
3.3 V 16-bit
5 V 16-bit
3.3 V
5V
3.3 V CardBus
3.3 V 16-bit
5 V 16-bit
0.5 VCCP
2
0.475 VCC(A/B)
2
2.4
0.7 VCC
2
0
0
0
0
0
0
0
VCCP
VCCP
VCC(A/B)
VCC(A/B)
VCC(A/B)
VCC
VCC
0.3 VCCP
0.8
0.325 VCC(A/B)
0.8
0.8
0.2 VCC
0.8
Input voltage
Output voltage
Input transition time
(tr and tf)
PCI
PC Card
Miscellaneous‡
PCI
PC Card
Miscellaneous‡
PCI and PC Card
Miscellaneous‡
0
VCCP
0
VCCCB
0
VCC
0
VCC
0
VCC
0
VCC
1
4
0
6
Output current
TPBIAS outputs
–5.6
1.3
Differential input
Cable inputs during data reception
118
260
voltage
Cable inputs during arbitration
168
265
Common-mode input
voltage
TPB cable inputs, source power node
TPB cable inputs, nonsource power node
0.4706
0.4706
2.515
2.015¶
Powerup reset time
GRST input
2
Receive input jitter
TPA, TPB cable inputs
S100 operation
S200 operation
S400 operation
±1.08
±0.5
±0.315
Receive input skew
Between TPA and TPB
cable inputs
S100 operation
S200 operation
S400 operation
±0.8
±0.55
±0.5
Operating ambient temperature range
0
25
70
Virtual junction temperature
0
25
115
UNIT
V
V
V
V
V
V
V
V
V
V
V
V
ns
mA
mV
V
ms
ns
ns
°C
°C
† Applies to external inputs and bidirectional buffers without hysteresis
‡ Miscellaneous terminals are 1, 2, 12, 17, 111, 112, 125, 167, 181, and 187 for the PDV packaged device and B10, C09, D01, E03, F12, G03,
H02, L17, P17, and P18 for the GHK packaged device (CNA, SCL, SDA, SUSPEND, GRST, CDx, PHY_TEST_MA, and VSx terminals).
§ Applies to external output buffers
¶ For a node that does not source power, see Section 4.2.2.2 in IEEE Std 1394a–2000.
# These junction temperatures reflect simulation conditions. The customer is responsible for verifying junction temperature.
12–2