PCI7510 Datasheet, PDF (225/234 Pages) Texas Instruments – PC Card, Smart Card and Integrated

11.21 Power-Management Control/Status Register
This register determines and changes the current power state of the firmware loading function of the PCI7510 device.
The contents of this register are not affected by the internally generated reset caused by the transition from the D3_hot
to D0 state. See Table 11–7 for a complete description of the register contents.
Bit
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
Name
Power-management control/status
Type
RC R
R
R
R
R
R
R
R
R
R
R
R
R RW RW
Default 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Register:
Offset:
Type:
Default:
Power-management control/status
48h
Read-only, Read/Clear, Read/Write
0000h
BIT
15
14–13
12–9
8
7–2
1–0
Table 11–7. Power-Management Control/Status Register Description
SIGNAL
TYPE
DESCRIPTION
PME_STAT
PME status. This bit defaults to 0 because the firmware loading function does not support PME
RC _{generation from any state.}
DATA_SCALE
R
Data scale. This 2-bit field returns 0s when read because the firmware loading function does not use
the data register.
DATA_SEL
R
Data select. This 4-bit field returns 0s when read because the firmware loading function does not use
the data register.
PME_EN
R
PME enable. This bit defaults to 0 because the firmware loading function does not support PME
generation from any state.
RSVD
R Reserved. Bits 7–2 return 0s when read.
PWR_STATE
Power state. This 2-bit field is used both to determine the current power state of the function and to
set the function into a new power state. This field is encoded as follows:
RW
00 = D0
01 = D1
10 = D2
11 = D3hot
11.22 Power-Management Bridge Support Extension Register
This read-only register is not applicable to the firmware loading function of the PCI7510 device and returns 00h when
read.
Bit
7
6
5
4
3
2
1
0
Name
Power-management bridge support extension
Type
R
R
R
R
R
R
R
R
Default
0
0
0
0
0
0
0
0
Register:
Offset:
Type:
Default:
Power-management bridge support extension
4Ah
Read-only
00h
11–10