PCI7510 Datasheet, PDF (160/234 Pages) Texas Instruments – PC Card, Smart Card and Integrated

8 OHCI Registers
The OHCI registers defined by the 1394 Open Host Controller Interface Specification are memory-mapped into a
2K-byte region of memory pointed to by the OHCI base address register at offset 10h in PCI configuration space (see
Section 7.8). These registers are the primary interface for controlling the PCI7510 IEEE 1394 link function.
This section provides the register interface and bit descriptions. Several set/clear register pairs in this programming
model are implemented to solve various issues with typical read-modify-write control registers. There are two
addresses for a set/clear register: RegisterSet and RegisterClear. See Table 8–1 for a register listing. A 1 bit written
to RegisterSet causes the corresponding bit in the set/clear register to be set to 1; a 0 bit leaves the corresponding
bit unaffected. A 1 bit written to RegisterClear causes the corresponding bit in the set/clear register to be cleared;
a 0 bit leaves the corresponding bit in the set/clear register unaffected.
Typically, a read from either RegisterSet or RegisterClear returns the contents of the set or clear register, respectively.
However, sometimes reading the RegisterClear provides a masked version of the set or clear register. The interrupt
event register is an example of this behavior.
Table 8–1. OHCI Register Map
DMA CONTEXT
—
REGISTER NAME
OHCI version
GUID ROM
Asynchronous transmit retries
CSR data
CSR compare
CSR control
Configuration ROM header
Bus identification
Bus options
GUID high
GUID low
Reserved
Configuration ROM mapping
Posted write address low
Posted write address high
Vendor ID
Reserved
Host controller control
Reserved
‡ _{One or more bits in this register are cleared only by the assertion of GRST.}
ABBREVIATION
Version
GUID_ROM
ATRetries
CSRData
CSRCompareData
CSRControl
ConfigROMhdr
BusID
BusOptions
GUIDHi
GUIDLo
—
ConfigROMmap
PostedWriteAddressLo
PostedWriteAddressHi
VendorID
—
HCControlSet
HCControlClr
—
OFFSET
00h
04h
08h
0Ch
10h
14h
18h
1Ch
20h
24h
28h
2Ch–30h
34h
38h
3Ch
40h
44h–4Ch
50h
54h
58h–5Ch
8–1