TMS320DM368 Datasheet, PDF (22/208 Pages) Texas Instruments – Digital Media System-on-Chip (DMSoC)

TMS320DM368
SPRS668A – APRIL 2010
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Name
CIN1 ⁽⁵⁾
CIN0 ⁽⁵⁾
YIN7⁽⁵⁾ / GIO103
/SPI3_SCLK
YIN6⁽⁵⁾ / GIO102
/SPI3_SIMO
YIN5⁽⁶⁾ / GIO101
/SPI3_SCS[0]
YIN4⁽⁶⁾ / GIO100 /
SPI3_SOMI /
SPI3_SCS[1]
BGA
ID
A18
B17
C12
A13
B13
D12
Table 2-5. Pin Descriptions (continued)
Type Group
(1)
Power
Supply ⁽²⁾
IPU Reset
IPD⁽³⁾ State
Description ⁽⁴⁾
I/O ISIF
V_{DD_ISIF18_33}
IPD
Input Standard ISIF Analog Front End (AFE): raw[1]
YCC 16-bit: time multiplexed between chroma:
CB/CR[01]
YCC 08-bit (which allows for 2 simultaneous decoder
inputs), it is time multiplexed between luma and
chroma of the upper channel. Y/CB/CR[01]
I/O ISIF
V_{DD_ISIF18_33}
IPD
Input Standard ISIF Analog Front End (AFE): raw[0]
YCC 16-bit: time multiplexed between chroma:
CB/CR[00]
YCC 08-bit (which allows for 2 simultaneous decoder
inputs), it is time multiplexed between luma and
chroma of the upper channel. Y/CB/CR[00]
I/O ISIF/
GIO /
SPI3
V_{DD_ISIF18_33}
IPD
Input Standard ISIF Analog Front End (AFE): raw[15]
YCC 16-bit: time multiplexed between luma: Y[07]
YCC 08-bit (which allows for 2 simultaneous decoder
inputs), it is time multiplexed between luma and
chroma of the lower channel. Y/CB/CR[07]
GIO: GIO[103]
SPI3: Clock
I/O ISIF /
GIO /
SPI3
V_{DD_ISIF18_33}
IPD
Input Standard ISIF Analog Front End (AFE): raw[14]
YCC 16-bit: time multiplexed between luma: Y[06]
YCC 08-bit (which allows for 2 simultaneous decoder
inputs), it is time multiplexed between luma and
chroma of the lower channel. Y/CB/CR[06]
GIO: GIO[102]
SPI3: Slave Input Master Output Data Signal
I/O ISIF /
GIO /
SPI3
V_{DD_ISIF18_33}
IPD
Input Standard ISIF Analog Front End (AFE): raw[13]
YCC 16-bit: time multiplexed between luma: Y[05]
YCC 08-bit (which allows for 2 simultaneous decoder
inputs), it is time multiplexed between luma and
chroma of the lower channel. Y/CB/CR[05]
GIO: GIO[101]
SPI3: Chip Select 0
I/O ISIF /
GIO /
SPI3
V_{DD_ISIF18_33}
IPD
Input Standard ISIF Analog Front End (AFE): raw[12]
YCC 16-bit: time multiplexed between luma: Y[04]
YCC 08-bit (which allows for 2 simultaneous decoder
inputs), it is time multiplexed between luma and
chroma of the lower channel. Y/CB/CR[04]
GIO: GIO[100]
SPI3: Slave Output Master Input Data Signal
SPI3: Chip Select 1
(6) The Y input (YIN[7:0]) and C input (CIN[7:0]) buses can be swapped by programming the field bit YCINSWP in the VPFE CCD
Configuration (CCDCFG) register (0x01C7 0136h).
IF YCINSWP bit is 0 (default) YIN[7:0] = Y signal / CIN[7:0] = C signal .
IF YCINSWP bit is 1 YIN[7:0] = C signal / CIN[7:0] = Y signal
For more information, see the TMS320DM36x Video Processing Front End (VPFE) Reference Guide (literature number SPRUFG8).
22
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