TLC770X Datasheet, PDF (21/27 Pages) Texas Instruments – BiCMOS SUPPLY VOLTAGE SUPERVISORS

Figure 19. The monitoring of a positive and negative supply voltage
The circuit shown in Figure 19. demonstrates the monitoring of a positive and a negative supply voltage. The device
  monitors the positive supply voltage and generates the system Reset. The delay time of device thus depends
ô  on the switch on times of the circuit being monitored. The device must only inform device of the failure of the
ô negative supply voltage. For this purpose, the RESET output of device is connected to the gate of the JFET
BC264C.
ô As long as device supplies a RESET signal, the transistor Q will remain conducting, and there will be a Low level
 at the input RESIN of device . Only when the negative supply voltage has reached its nominal value and transistor
Q has thus become non conducting will the RESIN input connected to it be pulled to High, and the delay time of
 device commence. After this, the system will be switched into an active state.
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