BUF16821 Datasheet, PDF (21/29 Pages) EPCOS – Programmable Gamma-Voltage Generator and VCOM Calibrator with Integrated Two-Bank Memory

BUF16821
www.ti.com ...................................................................................................................................................................................................... SBOS428 – JULY 2008
GENERAL POWERPAD DESIGN
CONSIDERATIONS
The BUF16821 is available in a thermally-enhanced
PowerPAD package. This package is constructed
using a downset leadframe upon which the die is
mounted; see Figure 19(a) and Figure 19(b). This
arrangement results in the lead frame being exposed
as a thermal pad on the underside of the package;
see Figure 19(c). This thermal pad has direct thermal
contact with the die; thus, excellent thermal
performance is achieved by providing a good thermal
path away from the thermal pad.
The PowerPAD package allows for both assembly
and thermal management in one manufacturing
operation. During the surface-mount solder operation
(when the leads are being soldered), the thermal pad
must be soldered to a copper area underneath the
package. Through the use of thermal paths within this
copper area, heat can be conducted away from the
package into either a ground plane or other
heat-dissipating device. Soldering the PowerPAD to
the printed circuit board (PCB) is always required,
even with applications that have low power
dissipation. This technique provides the necessary
thermal and mechanical connection between the lead
frame die pad and the PCB.
The PowerPAD must be connected to the most
negative supply voltage on the device, GND_A and
GND_D.
1. Prepare the PCB with a top-side etch pattern.
There should be etching for the leads as well as
etch for the thermal pad.
2. Place recommended holes in the area of the
thermal pad. Ideal thermal land size and thermal
via patterns for the HTSSOP-28 PWP package
can be seen in the technical brief, PowerPAD
Thermally-Enhanced Package (SLMA002),
available for download at www.ti.com. These
holes should be 13 mils (0,33mm) in diameter.
Keep them small, so that solder wicking through
the holes is not a problem during reflow. An
example thermal land pattern mechanical drawing
is attached to the end of this data sheet.
3. Additional vias may be placed anywhere along
the thermal plane outside of the thermal pad area
to help dissipate the heat generated by the
BUF16821 IC. These additional vias may be
larger than the 13-mil diameter vias directly under
the thermal pad. They can be larger because
they are not in the thermal pad area to be
soldered; thus, wicking is not a problem.
4. Connect all holes to the internal plane that is at
the same voltage potential as the GND pins.
5. When connecting these holes to the internal
plane, do not use the typical web or spoke via
connection methodology. Web connections have
a high thermal resistance connection that is
useful for slowing the heat transfer during
soldering operations. This configuration makes
the soldering of vias that have plane connections
easier. In this application, however, low thermal
resistance is desired for the most efficient heat
transfer. Therefore, the holes under the
BUF16821 PowerPAD package should make
their connection to the internal plane with a
complete connection around the entire
circumference of the plated-through hole.
6. The top-side solder mask should leave the
terminals of the package and the thermal pad
area with its twelve holes exposed. The
bottom-side solder mask should cover the holes
of the thermal pad area. This masking prevents
solder from being pulled away from the thermal
pad area during the reflow process.
7. Apply solder paste to the exposed thermal pad
area and all of the IC terminals.
8. With these preparatory steps in place, simply
place the BUF16821 IC in position and run the
chip through the solder reflow operation as any
standard surface-mount component. This
preparation results in a properly installed part.
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): BUF16821
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