OMAP3525-HIREL Datasheet, PDF (203/239 Pages) Texas Instruments – OMAP3525-HiRel and OMAP3530-HiRel Applications Processors

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OMAP3525-HiRel and OMAP3530-HiRel Applications Processors
SPRS599 – JUNE 2009
Table 6-110. High-Speed USB Switching Characteristics – 12-bit TLL Master Mode (continued)
NO.
PARAMETER
t_j(CLK)
Jitter standard deviation⁽²⁾, hsusbx_tll_clk
HSU6 t_d(CLKL-DIRV)
Delay time, hsusbx_tll_clk high to output hsusbx_tll_dir valid
t_{d(CLKL-DIRIV)}
Delay time, hsusbx_tll_clk high to output hsusbx_tll_dir invalid
t_d(CLKL-NXTV)
Delay time, hsusbx_tll_clk high to output hsusbx_tll_nxt valid
t_{d(CLKL-NXTIV)}
Delay time, hsusbx_tll_clk high to output hsusbx_tll_nxt invalid
HSU7 t_d(CLKL-DV)
Delay time, hsusbx_tll_clk high to output hsusbx_tll_data[7:0] valid
t_d(CLKL-DIV)
Delay time, hsusbx_tll_clk high to output hsusbx_tll_data[7:0] invalid
t_R(do)
Rise time, output signals
t_F(do)
Fall time, output signals
(2) The jitter probability density can be approximated by a Gaussian function.
1.15 V
MIN
MAX
200
9
0
9
0
9
0
2
2
UNIT
ps
ns
ns
ns
ns
ns
ns
ns
ns
HSU0
hsusbx_tll_clk
hsusbx_tll_stp
hsusbx_tll_dir_&_nxt
hsusbx_tll_data[7:0]
HSU2
HSU4
Data_IN
HSU3
HSU6
HSU7
HSU5
HSU6
Data_OUT
HSU7
In hsusbx, x is equal to 1, 2, or 3.
Figure 6-55. High-Speed USB – 12-bit TLL Master Mode
030-088
6.6.4.4 High-Speed Universal Serial Bus (USB) on Ports 1, 2, and 3 – 8-bit TLL Master Mode
Table 6-112 and Table 6-113 assume testing over the recommended operating conditions (see
Figure 6-56).
Table 6-111. High-Speed USB Timing Conditions – 8-bit TLL Master Mode
TIMING CONDITION PARAMETER
Input Conditions
t_R
t_F
Output Conditions
Input signal rise time
Input signal fall time
C_LOAD
Output load capacitance
VALUE
2
2
3
UNIT
ns
ns
pF
Table 6-112. High-Speed USB Timing Requirements – 8-bit TLL Master Mode⁽¹⁾
NO.
PARAMETER
HSU2
HSU3
HSU4
t_s(STPV-CLKH)
t_{s(CLKH-STPIV)}
t_{s(DATAV-CLKH)}
Setup time, hsusbx_tll_stp valid before hsusbx_tll_clk rising edge
Hold time, hsusbx_tll_stp valid after hsusbx_tll_clk rising edge
Setup time, hsusbx_tll_data[3:0] valid before hsusbx_tll_clk rising edge
1.15 V
MIN
MAX
6
0
3
UNIT
ns
ns
ns
(1) In hsusbx, x is equal to 1, 2, or 3.
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TIMING REQUIREMENTS AND SWITCHING CHARACTERISTICS 203