TLC5942 Datasheet, PDF (20/33 Pages) Texas Instruments – 16-Channel, 12-Bit PWM LED Driver with 7-Bit Dot Correction

TLC5942
SBVS096B – OCTOBER 2007 – REVISED OCTOBER 2007
www.ti.com
DCSOUT
Dot Correction Shift Register (7 Bits 16 Channels)
´
DC Data for OUT15
MSB
111
105
¼ DC Data for OUT14 DC Data for OUT1
104
7
DC Data for OUT0
LSB
6
0
¼ _OUT15-Bit6
OUT15-Bit0 OUT14-Bit6
¼
OUT1-Bit0 OUT0-Bit6
¼ _OUT0-Bit0
DCSIN
DCSCLK
¼
¼
¼
DC Data for OUT15
MSB
111
105
¼ DC Data for OUT14 DC Data for OUT1
104
7
DC Data for OUT0
LSB
6
0
¼ _OUT15-Bit6
OUT15-Bit0 OUT14-Bit6
¼
OUT1-Bit0 OUT0-Bit6
¼ _OUT0-Bit0
XDCLAT
Dot Correction Data Latch (7 Bits 16 Channels)
´
112 Bits
To Constant Current Driver Block
Figure 23. Dot Correction Shift Register and Latch Configuration
When the IC is powered on, the data in the Dot Correction Shift Register and data latch are not set to a specific
default value. Therefore, dot correction data must be written to the DC latch before turning on the constant
current output.
Status Information Data (SID)
Status information data (SID) are 17-bit, read-only data. Both the LED open detection (LOD) error and the
thermal error flag (TEF) are shifted out of the GSSOUT pin with each rising edge of the grayscale clock,
GSSCLK. The 16 LOD bits for each channel and the TEF bit are written into the 17 most significant bits of the
Grayscale Shift Register at the rising edge of the first GSSCLK after XGSLAT goes low. As a result, the previous
data in the 17 most significant bits are lost at the same time. No data are loaded into the other 175 bits.
Figure 24 shows the bit assignments. Figure 11 illustrates the read timing for the status information data.
Status Information Data (SID) Configuration
LOD Data of OUT15 to OUT0 (16 Bits)
MSB
16
15
¼
2
1
OUT15
LOD Data
OUT14
LOD Data
¼
OUT1
LOD Data
OUT0
LOD Data
TEF (1 Bit)
LSB
0
TEF Data
GSSOUT
¼
The 16 LOD bits for each channel and the TEF bit overwrite
the most significant 17 bits of the grayscale shift register at the
rising edge of the first GSSCLK after XGSLAT goes low.
GS Data for OUT15
MSB
191
180
¼ GS Data for OUT14 GS Data for OUT1
179
175
12
GS Data for OUT0
LSB
11
0
OUT15-Bit11
OUT15-Bit0 OUT14-Bit11
¼ ¼ _(LOD-OUT15)
(LOD-OUT4) (LOD-OUT3)
OUT14-Bit7
(TEF)
¼ ¼ _{OUT1-Bit0 OUT0-Bit11}
OUT0-Bit0
GSSIN
GSSCLK
Grayscale Shift Register (12 Bits 16 Channels)
´
Figure 24. Status Information Data Configuration
20
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