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OPA2614ID Datasheet, PDF (20/34 Pages) Texas Instruments – Dual, High Gain Bandwidth, High Output Current Operational Amplifier with Current Limit
OPA2614
SBOS305D − JUNE 2004 − REVISED AUGUST 2008
With VLPP as defined in Equation 8, and RM as defined in
Equation 4 and shown in Figure 11.
RM
1:n
Vpp =
2VLpp
n
VLpp
n
RM
RL
VLpp
Figure 11. Driver Peak Output Voltage
With the previous information available, it is now possible
to select a supply voltage and the turns ratio desired for the
transformer as well as calculate the headroom for the
OPA2614.
The model (shown in Figure 12) can be described with the
following set of equations:
1. First, as available output swing:
VPP + VCC * (V1 ) V2) * IP (R1 ) R2) (11)
2. Or as required supply voltage:
VCC + VPP ) (V1 ) V2) ) IP (R1 ) R2) (12)
The minimum supply voltage for a power and load
requirement is given by Equation 11.
+VCC
R1
V1
VO
IP
V2
R2
Figure 12. Line Driver Headroom Model
V1, V2, R1, and R2 are given in Table 1 for both +12V and
+5V operation.
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Table 1. Line Driver Headroom Model Values
V1
R1
V2
R2
+5V
1.0V
2Ω
1.0V
5.5Ω
+12V
1.0V
2Ω
1.0V
5.5Ω
TOTAL DRIVER POWER FOR xDSL
APPLICATIONS
The total internal power dissipation for the OPA2614 in an
xDSL line driver application will be the sum of the
quiescent power and the output stage power. The
OPA2614 holds a relatively constant quiescent current
versus supply voltage—giving a power contribution that is
simply the quiescent current times the supply voltage used
(the supply voltage will be greater than the solution given
in Equation 12). The total output stage power may be
computed with reference to Figure 13.
+VCC
IAVG
=
IP
CF
RT
Figure 13. Output Stage Power Model
The two output stages used to drive the load of Figure 11
can be seen as an H-Bridge in Figure 13. The average
current drawn from the supply into this H-Bridge and load
will be the peak current in the load given by Equation 10
divided by the crest factor (CF) for the xDSL modulation.
This total power from the supply is then reduced by the
power in RT to leave the power dissipated internal to the
drivers in the four output stage transistors. That power is
simply the target line power used in Equation 5 plus the
power lost in the matching elements (RM). In the examples
here, a perfect match is targeted, giving the same power
in the matching elements as in the load. The output stage
power is then set by Equation 13.
P OUT
+
IP
CF
VCC * 2PL
(13)
The total amplifier power is then:
PTOT + Iq
VCC
)
IP
CF
VCC * 2PL
(14)
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