BQ24161B_15 Datasheet, PDF (20/52 Pages) Texas Instruments – bq2416xx 2.5A, Dual-Input, Single-Cell Switched-Mode Li-Ion Battery Charger with Power Path Management and I2C Interface

bq24160, bq24160A, bq24161
bq24161B, bq24163, bq24168
SLUSAO0F – NOVEMBER 2011 – REVISED JULY 2014
www.ti.com
Feature Description (continued)
9.3.10 D+, D– Based Adapter Detection for the USB Input (D+, D–, bq24160/0A/3)
The bq24160/0A/3 contain a D+, D– based adapter detection circuit that is used to program the input current limit
for the USB input during DEFAULT mode. D+, D– detection is only performed in DEFAULT mode unless forced
by the D+, D–_EN bit in host mode. Writing to register 2 during detection stops the detection routine.
By default the USB input current limit is set to 100mA. When a voltage higher than UVLO is applied to the USB
input, the bq24160/0A/3 performs a charger source identification to determine if it is connected to an SDP (USB
port) or CDP/DCP (dedicated charger). The first step is D+, D- line connection detection as described in BC1.2.
Primary detection begins 10ms after the connection detection complete. The primary detection complies with the
method described in BC1.2. During primary detection, the D+, D- lines are tested to determine if the port is an
SDP or CDP/DCP. If a CDP/DCP is detected the input current limit is increased to 1.5A, if an SDP is detected
the current limit remains at 100mA, until changed via the I²C interface. These two steps require at least 90ms to
complete but if they have not completed within 500ms, the D+, D- detection routine selects 100mA for the
unknown input source. Secondary detection as described in BC1.2 is not performed.
Automatic detection is performed only if V_D+ and V_D– are less than 0.6V to avoid interfering with the USB
transceiver which may also perform D+, D– detection when the system is running normally. However, D+, D– can
be initiated at any time by the host by setting the D+, D– EN bit in the Control/Battery Voltage Register to 1. After
detection is complete the D+, D– EN bit is automatically reset to 0 and the detection circuitry is disconnected
from the D+, D– pins to avoid interference with USB data transfer.
When a command is written to change the input current limit in the I²C, this overrides the current limit selected by
D+/D– detection. D+, D– detection has no effect on the IN input.
9.3.11 USB Input Current Limit Selector Input (PSEL, bq24161/ 161B/ 168 only)
The bq24161, bq24161B, and bq24168 contain a PSEL input that is used to program the input current limit for
USB during DEFAULT mode. Drive PSEL high to indicate that a USB source is connected to the USB input and
program the 100mA (bq24161/8) or 500mA (bq24161B) current limit for USB. Drive PSEL low to indicate that an
AC Adapter is connected to the USB input. When PSEL is low, the IC starts up with a 1.5A current limit for USB.
PSEL has no effect on the IN input. Once an I²C write is done, the PSEL has no effect on the input current limit
until the watchdog timer expires.
9.3.12 Hardware Chip Disable Input (CD)
The bq2416xx contains a CD input that is used to disable the IC and place the bq2416xx into high-impedance
mode. Drive CD low to enable charge and enter normal operation. Drive CD high to disable charge and place the
bq2416xx into high-impedance mode. Driving CD high during DEFAULT mode resets the safety timer. Driving
CD high during HOST mode resets the safety timer and places the bq2416xx into high impedance mode. The
CD pin has precedence over the I²C control.
9.3.13 LDO Output (DRV)
The bq2416xx contains a linear regulator (DRV) that is used to supply the internal MOSFET drivers and other
circuitry. Additionally, DRV supplies up to 10mA external loads to power the STAT LED or the USB transceiver
circuitry. The maximum value of the DRV output is 5.45V; ideal for protecting voltage sensitive USB circuits from
high voltage fluctuations in the supply. The LDO is on whenever a supply is connected to the IN or USB inputs of
the bq2416xx. The DRV is disabled under the following conditions:
1. V_SUPPLY < UVLO
2. V_SUPPLY < V_SLP
3. Thermal Shutdown
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