BQ24161B_15 Datasheet, PDF (15/52 Pages) Texas Instruments – bq2416xx 2.5A, Dual-Input, Single-Cell Switched-Mode Li-Ion Battery Charger with Power Path Management and I2C Interface

www.ti.com
bq24160, bq24160A, bq24161
bq24161B, bq24163, bq24168
SLUSAO0F – NOVEMBER 2011 – REVISED JULY 2014
Feature Description (continued)
9.3.1.2 PWM Controller in Charge Mode
The bq2416xx provides an integrated, fixed-frequency 1.5MHz voltage-mode controller to power the system and
supply the charge current. The voltage loop is internally compensated and provides enough phase margin for
stable operation, allowing the use of small ceramic capacitors with low ESR. When starting up, the bq2416xx
uses a "soft-start" function to help limit inrush current. When coming out of High Impedance mode, the bq2416xx
starts up with the input current limit set to 40% of the value programmed in the I²C register. After 80ms, the input
current limit threshold steps up in 256µs steps. The steps are 40% to 50%, then 50% to 60%, then 60% to 70%,
then 70% to 80%, and finally 80% to 100%. After the final step, soft start is complete and will not be restarted
until the bq2416xx enters High Impedance mode.
The input scheme for the bq2416xx prevents battery discharge when the supply voltages are lower than VBAT
and also isolates the two inputs from each other. The high-side N-MOSFET (Q1/Q2) switches to control the
power delivered to the output. The DRV LDO provides a supply for the gate drive for the low side MOSFET,
while a bootstrap circuit (BST) with an external bootstrap capacitor is used to boost up the gate drive voltage for
Q1 and Q2.
Both inputs are protected by a cycle-by-cycle current limit that is sensed through the high-side MOSFETs for Q1
and Q2. The threshold for the current limit is set to a nominal 5A peak current. The inputs also utilize an input
current limit that limits the current from the power source.
9.3.2 Battery Charging Process
Assuming a vaild input source is attached to IN or USB, as soon as a deeply discharged or shorted battery is
attached to the BAT pin, (V_BAT < V_BATSHRT), the bq2416xx applies I_BATSHRT to close the pack protector switch and
bring the battery voltage up to acceptable charging levels. During this time, the battery FET is linearly regulated
and the system output is regulated to V_SYS(REG). Once the battery rises above V_BATSHRT, the charge current is
regulated to the value set in the I²C register. The battery FET is linearly regulated to maintain the system voltage
at V_SYS(REG). Under normal conditions, the time spent in this region is a very short percentage of the total
charging time, so the linear regulation of the charge current does not affect the overall charging efficiency for
very long. If the die temperature does rise, the thermal regulation circuit reduces the charge current to maintain a
die temperature less than 120°C. If the current limit for the SYS output is reached (limited by the input current
limit, or V_{IN_DPM}), the SYS output drops to the V_MINSYS output voltage. When this happens, the charge current is
reduced to provide the system with all the current that is needed while maintaining the minimum system voltage.
If the charge current is reduced to 0mA, pulling further current from SYS causes the output to fall to the battery
voltage and enter supplement mode. (See the Dynamic Power Path Management section for more details.)
Once the battery is charged enough so that the system voltage begins to rise above V_SYS(REG), the battery FET is
turned on fully and the battery is charged with the full programmed charge current set by the I²C interface,
I_CHARGE. The slew rate for the fast-charge current is controlled to minimize current and voltage overshoot during
transients. The charge current is regulated to I_CHARGE until the battery is charged to the regulation voltage. As the
battery voltage rises above VRCH, the battery regulation loop is activated. This may result in a small step down
in the charge current as the loops transition between the charge current and charge voltage loops. As the battery
voltage charges up to the regulation voltage, V_BATREG, the charge current is tapered down as shown in Figure 10
while the SYS output remains connected to the battery. The voltage between the BAT and PGND pins is
regulated to V_BATREG. The bq2416xx is a fixed single-cell voltage version, with adjustable regulation voltage (3.5V
to 4.44V), programmed using the I²C interface.
The bq2416xx monitors the charging current during the voltage-regulation phase. If the battery voltage is above
the recharge threshold and the charge current has naturally tapered down to and remains below termination
threshold, I_TERM, (without disturbance from events like supplement mode) for 32ms, the charger terminates
charge, turns off the battery charging FET and enters battery detection. Termination is disabled when the charge
current is reduced by a loop other than the voltage regulation loop or the input current limit is set to 100 mA. For
example, when the bq2416xx is in half charge due to TS function, reverse boost protection is active, LOW_CHG
bit is set, or the thermal regulation, V_INDPM or input current loops are active, termination will not occur. This
prevents false termination events. During termination, the system output is regulated to the V_SYS(REG) and
supports the full current available from the input and the battery supplement mode is available. (See the Dynamic
Copyright © 2011–2014, Texas Instruments Incorporated
Submit Documentation Feedback
15
Product Folder Links: bq24160 bq24160A bq24161 bq24161B bq24163 bq24168