TMS320C6747CZKBD4 Datasheet, PDF (2/227 Pages) Texas Instruments – TMS320C6745,TMS320C6747 Fixed/Floating-Point Digital Signal Processor

TMS320C6745, TMS320C6747
SPRS377E – SEPTEMBER 2008 – REVISED FEBRUARY 2013
• NOR (8-/16-Bit-Wide Data)
• NAND (8-/16-Bit-Wide Data)
• 16-Bit SDRAM With 128MB Address
Space (C6747 Only)
– EMIFB
• 32-Bit or 16-Bit SDRAM With 256MB
Address Space (C6747)
• 16-Bit SDRAM With 128MB Address
Space (C6745)
• Three Configurable 16550 type UART Modules:
– UART0 With Modem Control Signals
– Autoflow control signals (CTS, RTS) on
UART0 only
– 16-byte FIFO
– 16x or 13x Oversampling Option
• LCD Controller (C6747 Only)
• Two Serial Peripheral Interfaces (SPI) Each
With One Chip-Select
• Multimedia Card (MMC)/Secure Digital (SD)
Card Interface with Secure Data I/O (SDIO)
• Two Master/Slave Inter-Integrated Circuit (I²C
Bus™)
• One Host-Port Interface (HPI) With 16-Bit-Wide
Muxed Address/Data Bus For High Bandwidth
(C6747 only)
• Programmable Real-Time Unit Subsystem
(PRUSS)
– Two Independent Programmable Realtime
Unit (PRU) Cores
• 32-Bit Load/Store RISC architecture
• 4K Byte instruction RAM per core
• 512 Bytes data RAM per core
• PRU Subsystem (PRUSS) can be disabled
via software to save power
– Standard power management mechanism
• Clock gating
• Entire subsystem under a single PSC
clock gating domain
– Dedicated interrupt controller
– Dedicated switched central resource
• USB 1.1 OHCI (Host) With Integrated PHY
(USB1) (C6747 Only)
• USB 2.0 OTG Port With Integrated PHY (USB0)
– USB 2.0 High-/Full-Speed Client (C6747)
– USB 2.0 Full-Speed Client (C6745)
– USB 2.0 High-/Full-/Low-Speed Host (C6747)
– USB 2.0 Full-/Low-Speed Host (C6745)
– High-speed Functionality Available on C6747
www.ti.com
Device Only
– End Point 0 (Control)
– End Points 1,2,3,4 (Control, Bulk, Interrupt or
ISOC) Rx and Tx
• Three Multichannel Audio Serial Ports:
– C6747 supports 3 McASPs
– C6745 supports 2 McASPs
– Six Clock Zones and 28 Serial Data Pins
– Supports TDM, I2S, and Similar Formats
– DIT-Capable (McASP2)
– FIFO buffers for Transmit and Receive
• 10/100 Mb/s Ethernet MAC (EMAC):
– IEEE 802.3 Compliant (3.3-V I/O Only)
– RMII Media Independent Interface
– Management Data I/O (MDIO) Module
• Real-Time Clock With 32 KHz Oscillator and
Separate Power Rail (C6747 Only)
• One 64-Bit General-Purpose Timer
(Configurable as Two 32-Bit Timers)
• One 64-bit General-Purpose/Watchdog Timer
(Configurable as Two 32-bit General-Purpose
Timers)
• Three Enhanced Pulse Width Modulators
(eHRPWM):
– Dedicated 16-Bit Time-Base Counter With
Period And Frequency Control
– 6 Single Edge, 6 Dual Edge Symmetric or 3
Dual Edge Asymmetric Outputs
– Dead-Band Generation
– PWM Chopping by High-Frequency Carrier
– Trip Zone Input
• Three 32-Bit Enhanced Capture Modules
(eCAP):
– Configurable as 3 Capture Inputs or 3
Auxiliary Pulse Width Modulator (APWM)
outputs
– Single Shot Capture of up to Four Event
Time-Stamps
• Two 32-Bit Enhanced Quadrature Encoder
Pulse Modules (eQEP)
• C6747 Device:
– 256-Ball Pb-Free Plastic Ball Grid Array
(PBGA) [ZKB Suffix], 1.0-mm Ball Pitch
• C6745 Device
– 176-pin PowerPAD™ Plastic Quad Flat Pack
[PTP suffix], 0.5-mm Pin Pitch
• Commercial, Industrial, Extended, or
Automotive Temperature
2
TMS320C6745/6747 Fixed/Floating-Point Digital Signal Processor
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