SN74AUP1G17 Datasheet, PDF (2/16 Pages) Texas Instruments – LOW - POWER SINGLE SCHMITT-TRIGGLER BUFFER

SN74AUP1G17
LOWĆPOWER SINGLE SCHMITTĆTRIGGER BUFFER
SCES579C – JUNE 2004 – REVISED NOVEMBER 2005
description/ordering information (continued)
This device functions as an independent gate with Schmitt-trigger inputs, which allows for slow input transition
and better switching-noise immunity at the input.
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING‡
NanoStar − WCSP (DSBGA)
0.23-mm Large Bump − YEP
NanoFree − WCSP (DSBGA)
0.23-mm Large Bump − YZP (Pb-free)
Reel of 3000
SN74AUP1G17YEPR
SN74AUP1G17YZPR
_ _ _H7_
−40°C to 85°C _{SOT (SOT-23) − DBV}
Reel of 3000
Reel of 250
SN74AUP1G17DBVR
SN74AUP1G17DBVT
H17_
SOT (SC-70) − DCK
Reel of 3000 SN74AUP1G17DCKR
H7_
Reel of 250 SN74AUP1G17DCKT
SOT (SOT-553) − DRL
Reel of 4000 SN74AUP1G17DRLR H7_
† _{Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at}
www.ti.com/sc/package.
‡ _{DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site.}
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition
(1 = SnPb, • = Pb-free).
FUNCTION TABLE
INPUT OUTPUT
A
Y
H
H
L
L
logic diagram (positive logic)
2
A
4
Y
2
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