SN74AUP1G06_10 Datasheet, PDF (2/21 Pages) Texas Instruments – LOW-POWER SINGLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUTS

SN74AUP1G06
SCES590D – JULY 2004 – REVISED MAY 2010
www.ti.com
DESCRIPTION/ORDERING INFORMATION
The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable
applications. This family ensures a very low static and dynamic power consumption across the entire V_CC range
of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see
Figure 1 and Figure 2).
Static-Power Consumption
(mA)
Dynamic-Power Consumption
(pF)
Switching Characteristics
†
at 25 MHz
100%
80%
60%
40%
3.3-V
†
Logic
100%
80%
60%
40%
3.3-V
LVC †
Logic
3.5
3
2.5
2 ^Input
1.5
1
Output
20%
20%
0%
AUP
0%
†
Single, dual, and triple gates
AUP
0.5
0
-0.5
0
5
10 15 20 25 30 35 40 45
Time - ns
†
AUP1G08 data at C_L = 15 pF
Figure 1. AUP – The Lowest-Power Family
Figure 2. Excellent Signal Integrity
The output of this single inverter buffer/driver is open drain, and can be connected to other open-drain outputs to
implement active-low wired-OR or active-high wired-AND functions.
NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
T_A
–40°C to 85°C
ORDERING INFORMATION⁽¹⁾
PACKAGE ⁽²⁾
ORDERABLE PART NUMBER
NanoStar™ – WCSP (DSBGA)
0.23-mm Large Bump – YFP
Reel of 3000 SN74AUP1G06YFPR
QFN – DRY
Reel of 5000 SN74AUP1G06DRYR
uQFN – DSF
Reel of 5000 SN74AUP1G06DSFR
SOT (SOT-23) – DBV
Reel of 3000
Reel of 250
SN74AUP1G06DBVR
SN74AUP1G06DBVT
SOT (SC-70) – DCK
Reel of 3000
Reel of 250
SN74AUP1G06DCKR
SN74AUP1G06DCKT
TOP-SIDE MARKING⁽³⁾
_ _ _HT_
HT
HT
H06_
HT_
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) DBV/DCK: The actual top-side marking has one additional character that designates the wafer fab/assembly site.
YFP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the wafer fab/assembly site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
FUNCTION TABLE
INPUT
A
OUTPUT
Y
H
L
L
Z
LOGIC DIAGRAM (POSITIVE LOGIC)
2
A
4
Y
2
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