SN74AUC2G53_09 Datasheet, PDF (2/20 Pages) Texas Instruments – SINGLE-POLE DOUBLE-THROW (SPDT) ANALOG SWITCH OR 2:1 ANALOG MULTIPLEXER/DEMULTIPLEXER

SN74AUC2G53
SCES484C – AUGUST 2003 – REVISED JANUARY 2009 ................................................................................................................................................ www.ti.com
T_A
–40C to 85C
ORDERING INFORMATION
PACKAGE ^{(1) (2)}
ORDERABLE PART NUMBER
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
Reel of 3000
SN74AUC2G53YZPR
SSOP – DCT
Reel of 3000 SN74AUC2G53DCTR
VSSOP – DCU
Reel of 3000 SN74AUC2G53DCUR
TOP-SIDE MARKING⁽³⁾
_ _ _U4_
U53_ _ _
U53_
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
FUNCTION TABLE
CONTROL
INPUTS
INH
A
L
L
L
H
H
X
ON
CHANNEL
Y1
Y2
None
LOGIC DIAGRAM (POSITIVE LOGIC)
A5
7
SW
Y1
2
INH
6
SW
Y2
1
COM
NOTE A: For simplicity, the test conditions shown in Figures 1 through 4 and 6 through 10 are for the demultiplexer configuration. Signals may
be passed from COM to Y1 (Y2) or from Y1 (Y2) to COM.
SIMPLIFIED SCHEMATIC, EACH SWITCH (SW)
COM
Y
2
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