MSP430F2101 Datasheet, PDF (2/53 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER

MSP430x21x1
MIXED SIGNAL MICROCONTROLLER
SLAS439C − SEPTEMBER 2004 − REVISED JULY 2006
device pinout
DW, PW, or DGV PACKAGE
(TOP VIEW)
RGE PACKAGE
(TOP VIEW)
TEST 1
VCC 2
P2.5/CA5 3
VSS 4
XOUT/P2.7/CA7 5
XIN/P2.6/CA6 6
RST/NMI 7
P2.0/ACLK/CA2 8
P2.1/INCLK/CA3 9
P2.2/CAOUT/TA0/CA4 10
20 P1.7/TA2/TDO/TDI
19 P1.6/TA1/TDI/TCLK
18 P1.5/TA0/TMS
17 P1.4/SMCLK/TCK
16 P1.3/TA2
15 P1.2/TA1
14 P1.1/TA0
13 P1.0/TACLK
12 P2.4/TA2/CA1
11 P2.3/TA1/CA0
24 23 22 21 20 19
NC 1
18 P1.5/TA0/TMS
VSS 2
17 P1.4/SMCLK/TCK
XOUT/P2.7/CA7 ₃
16 P1.3/TA2
XIN/P2.6/CA6 ₄
15 P1.2/TA1
RST/NMI 5
14 P1.1/TA0
P2.0/ACLK/CA2 ₆
13 P1.0/TACLK
7 8 9 10 11 12
functional block diagram
VCC
VSS
XIN
XOUT
Basic Clock
System+
ACLK
SMCLK
MCLK
Flash
8kB
4kB
2kB
1kB
16MHz
CPU
incl. 16
Registers
MAB
MDB
RAM
256B
256B
128B
128B
Note: NC pins not internally connected
Power Pad connection to VSS recommended
P1.x & JTAG
8
P2.x &
XIN/XOUT
8
Comparator
_A+
8 Channel
Input Mux
Port P1
Port P2
8 I/O
Interrupt
capability,
pull−up/down
resistors
8 I/O
Interrupt
capability,
pull−up/down
resistors
Emulation
(2BP)
JTAG
Interface
Brownout
Protection
Watchdog
WDT+
15/16−Bit
Timer_A3
3 CC
Registers
RST/NMI
NOTE: See port schematics section for detailed I/O information.
2
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