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CD54HC174_08 Datasheet, PDF (2/14 Pages) Texas Instruments – High-Speed CMOS Logic Hex D-Type Flip-Flop with Reset
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CD54HC174, CD74HC174, CD54HCT174, CD74HCT174
Functional Diagram
CP
D0
CP
D
Q0
R
D1
Q1
D2
Q2
D3
Q3
D4
Q4
D5
Q5
MR
TRUTH TABLE
INPUTS
OUTPUT
RESET (MR)
CLOCK CP
DATA Dn
Qn
L
X
X
L
H
↑
H
H
H
↑
L
L
H
L
X
Q0
H = High Voltage Level, L = Low Voltage Level, X = Irrelevant, ↑ = Transition from Low to
High Level, Q0 = Level Before the Indicated Steady-State Input Conditions Were Established
Logic Diagram
3 (4, 6, 11, 13, 14) D
Dn
CL
p
n
CL
CL
p
n
CL
R
1
MR
9
CP
CL
p
n
CL
CL
CP
ONE OF SIX F/F
CL
p
n
CL CL
TO OTHER FIVE F/F
TO OTHER FIVE F/F
Q 2 (5, 7, 10, 12, 15)
Qn
8 16
VCC
2
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