TMS320C6670 Datasheet, PDF (197/206 Pages) Texas Instruments – Multicore Fixed and Floating-Point System-on-Chip

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Figure 7-60
Figure 7-61
RP1CLKN
RP1CLKP
TMS320C6670
Multicore Fixed and Floating-Point System-on-Chip
SPRS689—November 2010
AIF2 RP1 Frame Synchronization Clock Timing
RP1CLKN
1
2
3
RP1CLKP
4
5
AIF2 RP1 Frame Synchronization Burst Timing
6
RP1FBP/N
RP1 Frame Burst BIT 0
RP1 Frame Burst BIT 1
Figure 7-62
AIF2 Physical Layer Synchronization Pulse Timing
10
PHYSYNC
8
9
RP1 Frame Burst BIT N
7
Figure 7-63
AIF2 Radio Synchronization Pulse Timing
13
RADSYNC
11
12
Table 7-82 AIF2 Timer Module Switching Characteristics
(see Figure 7-64)
No.
14
tw(EXTFRAMEEVENTH)
15
tw(EXTFRAMEEVENTL)
End of Table 7-82
Parameter
External Frame Event
Pulse width, EXTFRAMEEVENT output high
Pulse width, EXTFRAMEEVENT output low
1 C1 = tc(RP1CLKN/P)
Figure 7-64 AIF2 Timer External Frame Event Timing
14
15
EXT FRAME EVENT
Min
Max
Unit
4 * C1 ⁽¹⁾
ns
4 * C1
ns
Copyright 2010 Texas Instruments Incorporated
TMS320C6670 Peripheral Information and Electrical Specifications 197