TLC59731 Datasheet, PDF (19/24 Pages) Texas Instruments – 3-Channel, 8-Bit, PWM LED Driver with Single-Wire Interface (EasySet)

TLC59731
www.ti.com
SBVS222 – FEBRUARY 2013
HOW TO CONTROL DEVICES CONNECTED IN SERIES
The 8-bit write command and 24-bit grayscale (GS) data for OUT0 to OUT2 (for a total of 32 bits of data) must
be written to the device.Figure 20 shows the 32-bit data packet configuration. When multiple devices are
cascaded (as shown in Figure 21), N times the packet must be written into each TLC59731 in order to control all
devices. There is no limit on how many devices can be cascaded, as long as proper VCC voltage is supplied.
The packet for all devices must be written again whenever any GS data changes.
MSB
Data 0 Data 0
for t_CYCLE for t_CYCLE
Data
1
Data
1
Data
1
Data
0
Data
1
Data
0
Data
0 or 1
Data
0 or 1
Data
0 or 1
Data
0 or 1
Data
0 or 1
LSB
Data
0 or 1
Write Command Data (8 Bits)
(3Ah = 00111010b)
Bit 7
OUT2
Bit 0
GS Data (8 Bits)
Bit 7 _OUT1
Bit 0
GS Data (8 Bits)
Figure 20. 32-Bit Data Packet Configuration for One TLC59731
Bit 7
OUT0
Bit 0
GS Data (8 Bits)
V_LED
GND
5.0 V
R_VCC
VCC
Controller
CLK
GND
C_VCC
0.1 µF
1st Device
VCC
SDI
SDO
GND
GND
2nd Device
VCC
SDI
SDO
GND
GND
GND
N-1st Device
VCC
SDI
SDO
GND
Nth Device
VCC
SDI
SDO
GND
GND
Figure 21. Cascade Connection of N TLC59731 Units (Internal Shunt Regulator Mode)
Refer to Figure 22 for the 32-bit data packet, EOS, and GSLAT input timing of all devices. The function setting
write procedure and display control is as follows:
1. Power-up VCC (V_LED); all OUTn are off because GS data are not written yet.
2. Write the 32-bit data packet (MSB-first) for the first device using t_CYCLE and the data write sequences
illustrated in Figure 16 and Figure 17. The first 8-bits of the 32-bit data packet are used as the write
command. The write command must be 3Ah (00111010b); otherwise, the 24-bit GS data in the 32-bit shift
register are not copied to the 24-bit GS data latch.
3. Execute one communication cycle EOS (refer to Figure 18) for the first device.
4. Write the 32-bit data packet for the second TLC59731 as described step 2. However, t_CYCLE should be set to
the same timing as the first device.
5. Execute one communication cycle EOS for the second device.
6. Repeat steps 4 and 5 until all devices have GS data.
7. The number of total bits is 32 × N. After all data are written, execute a GSLAT sequence as described in
Figure 19 in order to copy the 24-bit LSBs in the 32-bit shift resister to the 24-bit GS data latch in each
device; PWM control starts with the written GS data at the same time.
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