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MSP430AFE2X3 Datasheet, PDF (19/47 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER
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Schmitt-Trigger Inputs (Ports Px and RST/NMI)
PARAMETER
TEST CONDITIONS
VIT+ Positive-going input threshold voltage
VIT-
Vhys
RPull
CI
Negative-going input threshold voltage
Input voltage hysteresis (VIT+ - VIT-)
Pullup/pulldown resistor
(not RST/NMI pin)
Input capacitance
For pullup: VIN = VSS;
For pulldown: VIN = VCC
VIN = VSS or VCC
MSP430AFE2x3
MSP430AFE2x2
MSP430AFE2x1
SLAS701A – NOVEMBER 2010 – REVISED MARCH 2011
VCC
MIN TYP
MAX UNIT
0.45 VCC
3V
1.35
0.75 VCC V
2.25
0.25 VCC
3V
0.75
0.55 VCC V
1.65
3V
0.3
1.0 V
3V
20
35
50 kΩ
5
pF
Leakage Current (Ports Px)
Ilkg(Px.y)
PARAMETER
High-impedance leakage current
TEST CONDITIONS
(1) (2)
VCC
MIN TYP MAX UNIT
3V
±50 nA
(1) The leakage current is measured with VSS or VCC applied to the corresponding pin(s), unless otherwise noted.
(2) The leakage of the digital port pins is measured individually. The port pin is selected for input and the pullup/pulldown resistor is
disabled.
Outputs (Ports Px)
PARAMETER
VOH High-level output voltage
VOL Low-level output voltage
TEST CONDITIONS
IOH(max) = -6 mA (1)
IOL(max) = 6 mA (1)
VCC
MIN
TYP MAX UNIT
3V
VCC – 0.2
V
3V
VSS + 0.2
V
(1) The maximum total current, IOH(max) and IOL(max), for all outputs combined, should not exceed ±48 mA to hold the maximum voltage drop
specified.
Output Frequency (Ports Px)
fPx.y
fPort_CLK
PARAMETER
Port output frequency (with load)
Clock output frequency
TEST CONDITIONS
Px.y, CL = 20 pF, RL = 1 kΩ(1)(2)
Px.y, CL = 20 pF(2)
VCC
MIN TYP MAX UNIT
3V
12
MHz
3V
16
MHz
(1) A resistive divider with two 0.5-kΩ resistors between VCC and VSS is used as load. The output is connected to the center tap of the
divider.
(2) The output voltage reaches at least 10% and 90% VCC at the specified toggle frequency.
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