LP38691_15 Datasheet, PDF (19/34 Pages) Texas Instruments – LP3869x/-Q1 500-mA Low-Dropout CMOS Linear Regulators Stable With Ceramic Output Capacitors

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LP38691, LP38693, LP38691-Q1, LP38693-Q1
SNVS321N – JANUARY 2005 – REVISED MARCH 2015
10 Power Supply Recommendations
The LP38691 and LP38693 are designed to operate from an input supply voltage range of 2.7 V to 10 V. The
input supply should be well regulated and free of spurious noise. To ensure that the device output voltage is well
regulated, input supply should be at least V_OUT + 0.5 V, or 2.7 V, whichever is higher. A minimum capacitor value
of 1-μF is required to be within 1 cm of the IN pin.
11 Layout
11.1 Layout Guidelines
The dynamic performance of the LP38691 or LP38693 is dependent on the layout of the PCB. PCB layout
practices that are adequate for typical LDOs may degrade the load regulation, PSRR, noise, or transient
performance of the LP38691 or LP38693.
Best performance is achieved by placing C_IN and C_OUT on the same side of the PCB as the LP38691 or
LP38693, and as close as is practical to the package. The ground connections for C_IN and C_OUT should be back
to the LP38691 or LP38693 GND pin using as wide, and as short, a copper trace as is practical.
Connections using long trace lengths, narrow trace widths, and/or connections through vias should be avoided.
These will add parasitic inductances and resistance that results in inferior performance especially during transient
conditions.
A Ground Plane, either on the opposite side of a two-layer PCB, or embedded in a multi-layer PCB, is strongly
recommended. This Ground Plane serves two purposes:
• Provides a circuit reference plane to assure accuracy.
• Provides a thermal plane to remove heat from the LP38691 or LP38693 WSON package through thermal vias
under the package DAP.
11.1.1 WSON Mounting
The NGG0006A (No Pullback) 6-Lead WSON package requires specific mounting techniques which are detailed
in the TI AN-1187 Application Report SNOA401. Referring to the section PCB Design Recommendations, it
should be noted that the pad style which should be used with the WSON package is the NSMD (non-solder mask
defined) type. Additionally, it is recommended the PCB terminal pads to be 0.2 mm longer than the package
pads to create a solder fillet to improve reliability and inspection.
The input current is split between two IN pins, 1 and 6. The two IN pins must be connected together to ensure
that the device can meet all specifications at the rated current.
The thermal dissipation of the WSON package is directly related to the printed circuit board construction and the
amount of additional copper area connected to the DAP.
The DAP (exposed pad) on the bottom of the WSON package is connected to the die substrate with a conductive
die attach adhesive. The DAP has no direct electrical (wire) connection to any of the pins. There is a parasitic PN
junction between the die substrate and the device ground. As such, it is strongly recommend that the DAP be
connected directly to the ground at device lead 2 (that is, GND). Alternately, but not recommended, the DAP may
be left floating (that is, no electrical connection). The DAP must not be connected to any potential other than
ground.
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Product Folder Links: LP38691 LP38693 LP38691-Q1 LP38693-Q1