DRV8307_15 Datasheet, PDF (19/34 Pages) Texas Instruments – DRV8307 Brushless DC Motor Controller

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DRV8307
SLVSCK2 – APRIL 2014
8.4 Device Functional Modes
8.4.1 Clock PWM Mode
In PWM input mode, the PWM input signal is timed using a 50-MHz clock to generate a 12-bit number that
corresponds to the duty cycle of the incoming PWM signal. The input PWM frequency should be between 16 and
50 kHz; higher PWM frequencies work, but resolution is degraded. Note that the gate driver’s output PWM
frequency is independent of the speed control PWM input frequency; the output PWM frequency is 25 kHz.
The outputs of the PWM generators are the signals U_PD, V_PD, and W_PD. These contain the duty cycle
information for each phase.
Figure 10 shows modulation and PWM generation.
PWM Generators
PWM
PWM Input
Timer
100 MHz
12-bit
PWM
12-bit
PWM
12-bit
PWM
U_PD
V_PD
W_PD
Figure 10. Modulation and PWM Generation
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