BQ24266_15 Datasheet, PDF(19/41 Page) Texas Instruments – bq24266 3A, 30V Standalone Single-Input, Single-Cell Switchmode Li-Ion Battery Charger

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BQ24266_15 Datasheet, PDF (19/41 Pages) Texas Instruments – bq24266 3A, 30V Standalone Single-Input, Single-Cell Switchmode Li-Ion Battery Charger

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bq24266

SLUSBY5F â JUNE 2014 â REVISED AUGUST 2015

Device Functional Modes (continued)

Once the battery is charged enough that the system voltage rises above VSYSREG(LO) (approximately 3.5V), the

battery FET is turned on fully and the battery is charged with the full programmed charge current set by ISET.

The charge current is regulated to ICHARGE until the voltage between BAT and PGND reaches the regulation

voltage. The voltage between BAT and PGND is regulated to VBATREG (CV mode) while the charge current

naturally tapers down as shown in Figure 10. During CV mode, the SYS output remains connected to the battery.

The impedance of the battery FET is increased to 4x of the fully on value when IBAT falls below ~350mA to

provide increased accuracy during termination. This will show a small rise in the SYS voltage when the RDS(ON)

increases below ~350mA.

Once the charge current tapers down to the termination threshold, ITERM, and the battery voltage is above the

recharge threshold, the bq24266 terminates charge, turns off the battery charging FET and enters battery

detection (see Battery Detection section for more details). The system output is regulated to the VSYSREG(HI) and

supports the full current available from the input. The battery supplement mode is available to supply any SYS

load that cannot be supported by the input source (see the Dynamic Power Path Management section for more

details). The termination current level is set to 10% of the charge current. Termination is disabled when any loop

is active other than CC or CV. This includes VINDPM, input current limit, or thermal regulation. Termination is also

disabled during TS warm/cool conditions.

A charge cycle is initiated when one of the following conditions is detected:

1. The battery voltage falls below the VBATREG-VRCH threshold.

2. IN Power-on reset (POR)

3. Charge disabled then enabled using CE

4. IUSB toggeld from high impedance to any charge state

7.4.5 Charge Time Optimizer

The CC to CV transition is enhanced in the bq24266 architecture. The "knee" between CC and CV is very sharp.

This enables the charger to remain in CC mode as long as possible before beginning to taper the charge current

(CV mode). This provides a decrease in charge time as compared to older topologies.

7.4.6 Battery Detection

When termination conditions are met, a battery detection cycle is started. During battery detection, IDETECT is

pulled from VBAT for tDETECT(SNK) to verify there is a battery. If the battery voltage remains above VDETECT for the

full duration of tDETECT(SNK), a battery is determined to present and the IC enters âCharge Doneâ. If VBAT falls

below VDETECT, battery detection continues. The next cycle of battery detection, the bq24266 turns on IBATSHRT for

tDETECT(SRC). If VBAT rises to VDET(SRC1), the current source is turned off. In order to keep VBAT high enough to

close the battery protector, the current source turns on if VBAT falls to VDET(SRC2). The source cycle continues for

tDETECT(SRC). After tDETECT(SRC), the battery detection continues through another current sink cycle. Battery

detection continues until charge is disabled, the bq24266 enters high-z mode or a battery is detected. Once a

battery is detected, a new charge cycle begins. With no battery connected, the BAT output will transition from

VRCH to PGND with a high period of tDETECT(SRC) and a low period of tDETECT(SNK). See Figure 16 in the Application

Curves section.

7.4.7 Battery Overvoltage Protection (BOVP)

If the battery is ever above the battery OVP threshold (VBOVP), the battery OVP circuit shuts the PWM converter

off and the battery FET is turned on to discharge the battery to safe operating levels. In this condition, the

VBATREG is reset and may be below the battery voltage. This state can be entered when TS WARM conditions

decrease the VBATREG to less than the battery voltage. The battery OVP condition is cleared when the battery

voltage falls below the hysteresis of VBOVP by the battery discharging. When a battery OVP event exists for

tDGL(BOVP), the bq24266 turns the battery FET and BGATE on.

7.4.8 Dynamic Power Path Management

The bq24266 features a SYS output that powers the external system load connected to the battery. This output

is active whenever a valid source is connected to IN or BAT. When VSYS > VSYSREG(LO), the SYS output is

connected to VBAT. If the battery voltage falls to VMINSYS, VSYS is regulated to the VSYSREG(LO) threshold to

maintain the system output even with a deeply discharged or absent battery. In this mode, the SYS output

voltage is regulated by the buck converter and the battery FET is linearly regulated to regulate the charge current

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