BQ2023 Datasheet, PDF (19/27 Pages) Texas Instruments – SINGLE-WIRE ADVANCED BATTERY MONITOR IC FOR CELLULAR AND PDA APPLICATIONS

Selected
State
bq2023
SINGLEĆWIRE ADVANCED BATTERY MONITOR IC
FOR CELLULAR AND PDA APPLICATIONS
SLUS480B – MAY 2001
APPLICATION INFORMATION
Flash Page
No
Erase Command?
(40 Hex)
Yes
Host Transmits 16-Bit Page Code
Selected
State
CRC Generated From Command
and Page Erase Code
No
CRC
Correct?
Yes
Host Transmits Code 5A hex
Selected Page Erased
Wait for
Reset
Pulse
Figure 13. FLASH Erase Command
bq2023 registers
physical address space
The highest address decoded by the bq2023 is 0x011f. Physical registers located between 0x0020 and 0x00ff
are repeated on 256-byte boundaries, starting at 0x0120. Any write to address 0x0120 and above can cause
a data overwrite to FLASH and/or RAM.
register maintenance
The host system is responsible for register maintenance. To facilitate this maintenance, the bq2023 has a clear
register (TMP/CLR) that resets the specific counter or register pair to zero. The host system clears a register
by writing the corresponding register bit to 1. When the bq2023 completes the reset, the corresponding bit in
the TMP/CLR register is automatically reset to 0, which saves the host an extra write/read cycle. Clearing the
DTC register clears the STD bit and sets the DTC count rate to the default value of 1 count per 0.8789 s. Clearing
the CTC register clears the STC bit and sets the CTC count rate to the default value of 1 count per 0.8789 s.
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