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BQ2023 Datasheet, PDF (10/27 Pages) Texas Instruments – SINGLE-WIRE ADVANCED BATTERY MONITOR IC FOR CELLULAR AND PDA APPLICATIONS
bq2023
SINGLEĆWIRE ADVANCED BATTERY MONITOR IC
FOR CELLULAR AND PDA APPLICATIONS
SLUS480B – MAY 2001
APPLICATION INFORMATION
functional description (continued)
current sense offset
The bq2023 automatically self-calibrates and compensates for current offset. The self-calibration is performed
once every hour.
gas gauge control registers
The host maintains the charge/discharge and self-discharge count registers (CCR, CTC, DCR, DTC, and SCR).
To facilitate this, the bq2023 provides the CLR register to clear an individual counter or register pair. The host
system clears a register by writing the corresponding register bit to 1. When the bq2023 completes the clear
action, the corresponding bit in the CLR register is automatically reset to 0. Clearing the DTC or CTC registers
also clears the corresponding STC or STD bit in the MODE register.
device temperature measurement
The bq2023 reports die temperature in units of °K through register pair TEMPH-TEMPL. See the TMP register
description for more details.
register interface
Information exchange between the host system and the bq2023 is through the data register interface. See
Table 4. The register set consists of a 271-location address space of 8-bit bytes segmented into:
ADDRESS
0x010F
0x010E
0x010D
0x010C
0x010B
0x010A
0x0109
0x0108
0x0107
0x0106
0x0105
0x0104
0x0103
0x0102
0x0101
0x0100
0x00E0-0x00FF
0x00C0-0x00DF
0x00A0-0x00BF
0x0080-0x009F
0x0060-0x007F
0x0040-0x005F
0x0020-0x003F
0x0000-0x001F
NAME
DCRH
DCRL
CCRH
CCRL
SCRH
SCRL
DTCH
DTCL
CTCH
CTCL
MODE/WOE
CLR
TEMPH
TEMPL
FED
RAM
Flash
Flash
Flash
Flash
Flash
Flash
Flash
Table 4. bq2023 Memory Map
BIT 7
RSVD
RSVD
RSVD
BIT 6
SLEN
POR
PAGE6
BIT 5
BIT 4
BIT 3
BIT 2
Discharge-count register high byte
Discharge-count register low byte
Charge-count register high byte
Charge-count register low byte
Self-discharge count register high byte
Self-discharge count register low byte
Discharge-timer–counter register high byte
Discharge-timer-counter register low byte
Charge-timer-counter register high byte
Charge-timer-counter register low byte
STC
STD
WOE2 WOE1
STAT
CTC
DTC
SCR
Temperature high byte
Temperature low byte
PAGE5 PAGE4 PAGE3 PAGE2
Reserved
Page 7, 32 bytes of RAM
Page 6, 32 bytes of flash
Page 5, 32 bytes of flash
Page 4, 32 bytes of flash
Page 3, 32 bytes of flash
Page 2, 32 bytes of flash
Page 1, 32 bytes of flash
Page 0, 32 bytes of flash
BIT 1
WOE0
CCR
PAGE1
BIT 0
RSVD
DCR
PAGE0
10
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