AM1707_1004 Datasheet, PDF (183/198 Pages) Texas Instruments – AM1707 ARM Microprocessor

AM1707
www.ti.com
SPRS637A – FEBRUARY 2010 – REVISED APRIL 2010
Table 6-110. ARM Debug Features
Category
Hardware Feature
Availability
Software breakpoint
Unlimited
Basic Debug
Hardware breakpoint
Up to 14 HWBPs, including:
2 precise⁽¹⁾ HWBP inside ARM core which are shared
with watch points.
8 imprecise⁽¹⁾ HWBPs from ETM’s address comparators,
which are shared with trace function, and can be used
as watch point too.
4 imprecise⁽¹⁾ HWBPs from ICECrusher.
Up to 6 watch points, including:
Watch point
2 from ARM core which is shared with HWBPs and can
be associated with a data.
8 from ETM’s address comparators, which are shared
with trace function, and HWBPs.
Analysis
Watch point with Data
2 from ARM core which is shared with HWBPs.
8 watch points from ETM can be associated with a data
comparator, and ETM has total 4 data comparators.
Counters/timers
3x32-bit (1 cycle ; 2 event)
External Event Trigger In
1
External Event Trigger Out
1
Address range for trace
4
Data qualification for trace
2
System events for trace control
20
Trace Control
Counters/Timers for trace control
2x16-bit
State Machines/Sequencers
1x3-State State Machine
Context/Thread ID Comparator
1
Independent trigger control units
12
On-chip Trace
Capture
Capture depth PC
Capture depth PC + Timing
Application accessible
4k bytes ETB
4k bytes ETB
Y
(1) Precise hardware breakpoints will halt the processor immediately prior to the execution of the selected instruction. Imprecise breakpoints
will halt the processor some number of cycles after the selected instruction depending on device conditions.
Copyright © 2010, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications 183
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