TMS320C6455_07 Datasheet, PDF (181/250 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

HAS (input)
15
16
HCNTL[1:0] (input)
TMS320C6455
Fixed-Point Digital Signal Processor
SPRS276H – MAY 2005 – REVISED OCTOBER 2007
HR/W (input)
13
HSTROBE^(A) (input)
37
HCS (input)
1
3
2
HD[31:0] (output)
38
7
6
4
HRDY^(B) (output)
A. HSTROBE refers to the following logical operation on HCS, HDS1, and HDS2: [NOT(HDS1 XOR HDS2)] OR HCS.
B. Depending on the type of write or read operation (HPID without auto-incrementing; HPIA, HPIC, or HPID with
auto-incrementing) and the state of the FIFO, transitions on HRDY may or may not occur. For more detailed
information on the HPI peripheral, see the TMS320C645x DSP Host Port Interface (HPI) User's Guide (literature
number SPRU969).
C. The timing t_w(HSTBH), HSTROBE high pulse duration, must be met between consecutive HPI accesses in HPI32
mode.
Figure 7-48. HPI32 Read Timing (HAS Not Used, Tied High)
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C64x+ Peripheral Information and Electrical Specifications 181