THS4520 Datasheet, PDF (18/23 Pages) Texas Instruments – WIDEBAND, LOW NOISE, LOW DISTORTION FULLY DIFFERENTIAL AMPLIFIER WITH RAIL-TO-RAIL OUTPUTS

THS4520
SLOS503A – SEPTEMBER 2006 – REVISED OCTOBER 2006
There are two drawbacks to this configuration. One
is it requires additional current from the power
supply. Using the values shown for a gain of 0 dB
requires 10 mA more current with 5-V supply, and
6.5 mA more current with 3.3-V supply.
The other drawback is this configuration also
increases the noise gain of the circuit. In the 10-dB
gain case, noise gain increases by a factor of 1.7.
Table 4. RPU Values for Various Gains
Gain
0 dB
6 dB
10 dB
14 dB
20 dB
R_F
499 Ω
499 Ω
499 Ω
499 Ω
499 Ω
R_G
487 Ω
243 Ω
150 Ω
93.1 Ω
40.2 Ω
R_IT
54.9 Ω
59 Ω
68.1 Ω
82.5 Ω
221 Ω
R_PU
511 Ω
270 Ω
178 Ω
124 Ω
80.6 Ω
RS
V Signal
RS
V S+
R PU
RG
RF
RT
V S+
V S+
R PU
RG
RT
THS4520
CM
V S-
RO
V OUT-
RO
V OUT+
RF
Figure 37. THS4520 DC Coupled Single-Supply
with R_PU Used to Set V_IC
Figure 38 shows AC coupling to the source. Using
capacitors in series with the termination resistors
allows the amplifier to self-bias both input and output
to mid-supply.
RS
C
RG
RF
V _Signal
RS
RT
C
RG
RT
V S+ = 3 V to 5 V
THS4520
CM
V S-
RO
V _OUT-
RO
V OUT+
C
C
R_F
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1. Signal routing should be direct and as short as
possible into and out of the op amp circuit.
2. The feedback path should be short and direct
avoiding vias.
3. Ground or power planes should be removed
from directly under the amplifier’s input and
output pins.
4. An output resistor is recommended on each
output, as near to the output pin as possible.
5. Two 10-µF and two 0.1-µF power-supply
decoupling capacitors should be placed as near
to the power-supply pins as possible.
6. Two 0.1-µF capacitors should be placed between
the CM input pins and ground. This limits noise
coupled into the pins. One each should be
placed to ground near pin 4 and pin 9.
7. It is recommended to split the ground pane on
layer 2 (L2) as shown below and to use a solid
ground on layer 3 (L3). A single-point connection
should be used between each split section on L2
and L3.
8. A single-point connection to ground on L2 is
recommended for the input termination resistors
R1 and R2. This should be applied to the input
gain resistors if termination is not used.
9. The THS4520 recommended PCB footprint is
shown in Figure 39.
0.144
0.049
Pin 1
0.0095
0.015
0.144
0.012
0.0195 0.0705
0.032
0.010
vias
0.030
0.0245
Top View
Figure 39. QFN Etch and Via Pattern
Figure 38. THS4520 AC Coupled Single-Supply
Layout Recommendations
It is recommended to follow the layout of the external
components near the amplifier, ground plane
construction, and power routing of the EVM as
closely as possible. General guidelines are:
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