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RM46L852 Datasheet, PDF (18/172 Pages) Texas Instruments – 16/32-Bit RISC Flash Microcontroller
RM46L852
SPNS185 – SEPTEMBER 2012
www.ti.com
2.3.1.12 Multi-Buffered Serial Peripheral Interface Modules (MibSPI)
Table 2-12. PGE Multi-Buffered Serial Peripheral Interface Modules (MibSPI)
Terminal
Signal Name
MIBSPI1CLK
MIBSPI1NCS[0]/MIBSPI1SOMI[1]/MII_TXD[2]/
USB1.RCV/ECAP6
MIBSPI1NCS[1]/N2HET1[17]/MII_COL
/USB1.SUSPEND /EQEP1S
MIBSPI1NCS[2]/N2HET1[19]/MDIO
N2HET1[15]/MIBSPI1NCS[4]/ECAP1
N2HET1[24]/MIBSPI1NCS[5]/MII_RXD[0]/RMII_RXD[0]
MIBSPI1NENA/N2HET1[23]/MII_RXD[2]/
USB1.VP/ECAP4
MIBSPI1SIMO
144
PGE
95
105
130
40
41
91
96
93
N2HET1[08]/MIBSPI1SIMO[1]/MII_TXD[3]/
106
USB1.OverCurrent
MIBSPI1SOMI
94
MIBSPI1NCS[0]/MIBSPI1SOMI[1]/MII_TXD[2]/
105
USB1.RCV/ECAP6
MIBSPI3CLK/AWM1_EXT_SEL[1]/EQEP1A
53
MIBSPI3NCS[0]/AD2EVT/GIOB[2]/EQEP1I/N2HET2_PIN_nD 55
IS
MIBSPI3NCS[1]/N2HET1[25]/MDCLK
37
MIBSPI3NCS[2]/I2C_SDA/N2HET1[27]/nTZ2
4
MIBSPI3NCS[3]/I2C_SCL/N2HET1[29]/nTZ1
3
N2HET1[11]/MIBSPI3NCS[4]/N2HET2[18]/
6
USB2.OverCurrent/USB_FUNC.VBUSI/EPWM1SYNCO
MIBSPI3NENA /MIBSPI3NCS[5]/N2HET1[31]/EQEP1B
54
MIBSPI3NENA/MIBSPI3NCS[5]/N2HET1[31]/EQEP1B
54
MIBSPI3SIMO/AWM1_EXT_SEL[0]/ECAP3
52
MIBSPI3SOMI/AWM1_EXT_ENA/ECAP2
51
MIBSPI5CLK/MII_TXEN/RMII_TXEN
100
MIBSPI5NCS[0]/EPWM4A
32
MIBSPI5NENA/MII_RXD[3]/USB1.VM/MIBSPI5SOMI[1]/ECA 97
P5
MIBSPI5SIMO[0]/MII_TXD[1]/RMII_TXD[1]/MIBSPI5SOMI[2] 99
MIBSPI5SOMI[0]/MII_TXD[0]/RMII_TXD[0]
98
MIBSPI5NENA/MII_RXD[3]/USB1.VM/MIBSPI5SOMI[1]/ECA 97
P5
MIBSPI5SIMO[0]/MII_TXD[1]/RMII_TXD[1]/MIBSPI5SOMI[2] 99
Signal Default
Type Pull State
Pull Type
Description
I/O Pull Up
Programmable,
20uA
MibSPI1 clock, or GIO
MibSPI1 chip select, or
GIO
Pull Down Programmable, MibSPI1 chip select, or
20uA
GIO
Pull Up
Programmable,
20uA
Pull Down
Pull Up
Programmable,
20uA
Programmable,
20uA
MibSPI1 enable, or GIO
MibSPI1 slave-in master-
out, or GIO
MibSPI1 slave-in master-
out, or GIO
MibSPI1 slave-out master-
in, or GIO
I/O Pull Up
Programmable,
20uA
MibSPI3 clock, or GIO
MibSPI3 chip select, or
GIO
Pull Down Programmable, MibSPI3 chip select, or
20uA
GIO
Pull Up
Programmable, MibSPI3 chip select, or
20uA
GIO
MibSPI3 enable, or GIO
MibSPI3 slave-in master-
out, or GIO
MibSPI3 slave-out master-
in, or GIO
I/O Pull Up
Programmable,
20uA
MibSPI5 clock, or GIO
MibSPI5 chip select, or
GIO
MibSPI5 enable, or GIO
MibSPI5 slave-in master-
out, or GIO
MibSPI5 slave-out master-
in, or GIO
MibSPI5 SOMI, or GIO
MibSPI5 SOMI, or GIO
18
Device Package and Terminal Functions
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